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[Qemu-ppc] [PATCH 2/2] Implement the PowerPC Floating Point Status and C
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From: |
John Arbuckle |
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Subject: |
[Qemu-ppc] [PATCH 2/2] Implement the PowerPC Floating Point Status and Control Register Fraction Rounded bit |
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Date: |
Fri, 24 May 2019 22:21:37 -0400 |
Signed-off-by: John Arbuckle <address@hidden>
---
target/ppc/fpu_helper.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 0b7308f539..0baf1ce8e4 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -630,6 +630,10 @@ static void do_float_check_status(CPUPPCState *env,
uintptr_t raddr)
env->fpscr &= ~(1 << FPSCR_FI); /* clear the FPSCR[FI] bit */
}
+ /* Set or clear the Fraction Rounded bit */
+ env->fpscr = deposit32(env->fpscr, FPSCR_FR, 1,
+ (status & float_flag_rounded) != 0);
+
if (cs->exception_index == POWERPC_EXCP_PROGRAM &&
(env->error_code & POWERPC_EXCP_FP)) {
/* Differred floating-point exception after target FPR update */
--
2.14.3 (Apple Git-98)