Re: [Qemu-ppc] [RFC PATCH 0/6] target/ppc: convert VMX instructions to use TCG vector operations

[Richard Henderson]

On 12/10/18 2:54 PM, BALATON Zoltan wrote:
>> What was your host machine.  IIUC this change will only improve
>> performance if the host tcg backend is able to implement TCG vector
>> ops in terms of vector ops on the host.
> 
> Tried it on i5 650 which has: sse sse2 ssse3 sse4_1 sse4_2. I assume x86_64
> should be supported but not sure what are the CPU requirements.

Not quite.  I only support avx1 and later.

I thought about supporting sse4 and later (that's the minimum with all of the
instructions that do what we need), but there is only one cpu generation with
sse4 and without avx1, and avx1 is already 8 years old.


r~