Re: [Qemu-ppc] [PATCH v2 3/4] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models

[Cédric Le Goater]

>>>  typedef struct PnvChipClass {
>>>      /*< private >*/
>>> @@ -75,6 +95,7 @@ typedef struct PnvChipClass {
>>>  
>>>      hwaddr       xscom_base;
>>>  
>>> +    void (*realize)(PnvChip *chip, Error **errp);
>>
>> This looks the wrong way round from how things are usually done.
>> Rather than having the base class realize() call the subclass specific
>> realize hook, it's more usual for the subclass to set the
>> dc->realize() and have it call a k->parent_realize() to call up the
>> chain.  grep for device_class_set_parent_realize() for some more
>> examples.
>
> Ah. That is more to my liking. There are a couple of models following
> the wrong object pattern, xics, vio. I will check them.

So XICS is causing some head-aches because the ics-kvm model inherits
from ics-simple which inherits from ics-base. so we have a grand-parent
class to handle.

if we could affiliate ics-kvm directly to ics-base it would make the 
family affair easier. we need to check migration though.  

C.