Re: [Qemu-ppc] [PATCH 19/25] spapr: add hcalls support for the XIVE interrupt mode

[David Gibson]

On Tue, Dec 05, 2017 at 08:50:26AM -0600, Benjamin Herrenschmidt wrote:
> On Tue, 2017-12-05 at 18:00 +1100, David Gibson wrote:
> > > The CPU revision. But we won't introduce XIVE exploitation mode on 
> > > anything else than DD2.0 which has full XIVE support. Even STORE_EOI 
> > > that we should be adding.
> > 
> > Hrm.  Host CPU?  That's a problem - if guest visible properties like
> > this vary with the host CPU, migration breaks.
> 
> I don't think this is going to be a problem in practice. The
> availability of trigger comes from OPAL but in practice, all virtual
> interrupts are going to support it always,

Ok.  It still makes me nervous to derive guest visible features from
the host.  I'd prefer to just hardwire the XIVE model to always/never
advertise it and simply fail if that isn't workable for the host kernel.

> only some of the HW
> originated ones (PCIe MSIs for example and LSIs) won't. And we don't
> migrate with PCIe devices passed through.

.. and cross that bridge when we come to it.

> So the guest need the info, but we should be ok with migration from P9
> DD2.0 onwards. Nobody sane cares about P9 DD1.0.
> 
> Any future chip will have to ensure that we don't lose that property in
> HW least we lost migration, but that would break AIX too so I'm
> reasonably confident the HW guys will get that right ;-)
> 
> > > 
> > > > If it varies with host capabilities, that's going to be real pain for
> > > > migration.
> > > 
> > > Yes. I am not aware of any future extension but I agree this is
> > > something we need to keep an eye on.
> > 
> > I'm not talking about future extension, I'm meaning right now.
> 
> No, no issue right now.
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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