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Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9() |
Date: |
Tue, 4 Jul 2017 21:41:51 +1000 |
User-agent: |
Mutt/1.8.0 (2017-02-23) |
On Tue, Jul 04, 2017 at 01:15:00PM +0200, Greg Kurz wrote:
> On Tue, 4 Jul 2017 13:01:26 +0200
> Laurent Vivier <address@hidden> wrote:
>
> > Commit 5f3066d ("target/ppc: Allow workarounds for POWER9 DD1")
> > disables compatibility mode for POWER9 DD1 to allow to
> > boot on POWER9 DD1 host with KVM.
> >
> > As the workaround has been added in kvmppc_host_cpu_class_init(),
> > it applies only on CPU created with "-cpu host".
> > As we want to be able to use also "-cpu POWER9" on a POWER9 DD1
> > host, this patch moves the workaround from kvmppc_host_cpu_class_init()
> > to init_proc_POWER9().
> >
>
> As with ppc_cpu_initfn() in your previous version, init_proc_POWER9() is
> called for every CPU instance.. ie, all CPU will adjust the @pcr_supported
> class attribute...
Ah.. yeah.. I didn't notice that before. That's definitely not right.
> What about moving the workaround to ppc_POWER9_cpu_family_class_init()
> instead ? This would just require to expose mfpvr() in some header.
Yeah, as someone else pointed out using the host PVR is also
definitely not right (unless you're in a function specifically
connected to the host cpu class).
>
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -8913,8 +8913,10 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
> dc->props = powerpc_servercpu_properties;
> pcc->pvr_match = ppc_pvr_match_power9;
> pcc->pcr_mask = PCR_COMPAT_2_05 | PCR_COMPAT_2_06 | PCR_COMPAT_2_07;
> - pcc->pcr_supported = PCR_COMPAT_3_00 | PCR_COMPAT_2_07 | PCR_COMPAT_2_06
> |
> - PCR_COMPAT_2_05;
> + if (!kvm_enabled() || (mfpvr() & 0xffffff00) != CPU_POWERPC_POWER9_DD1) {
> + pcc->pcr_supported = PCR_COMPAT_3_00 | PCR_COMPAT_2_07 |
> + PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
> + }
> pcc->init_proc = init_proc_POWER9;
> pcc->check_pow = check_pow_nocheck;
> cc->has_work = cpu_has_work_POWER9;
>
> > Signed-off-by: Laurent Vivier <address@hidden>
> > ---
> > target/ppc/kvm.c | 11 -----------
> > target/ppc/translate_init.c | 15 ++++++++++++++-
> > 2 files changed, 14 insertions(+), 12 deletions(-)
> >
> > diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> > index f2f7c53..9d76817 100644
> > --- a/target/ppc/kvm.c
> > +++ b/target/ppc/kvm.c
> > @@ -2381,17 +2381,6 @@ static void kvmppc_host_cpu_class_init(ObjectClass
> > *oc, void *data)
> >
> > #if defined(TARGET_PPC64)
> > pcc->radix_page_info = kvm_get_radix_page_info();
> > -
> > - if ((pcc->pvr & 0xffffff00) == CPU_POWERPC_POWER9_DD1) {
> > - /*
> > - * POWER9 DD1 has some bugs which make it not really ISA 3.00
> > - * compliant. More importantly, advertising ISA 3.00
> > - * architected mode may prevent guests from activating
> > - * necessary DD1 workarounds.
> > - */
> > - pcc->pcr_supported &= ~(PCR_COMPAT_3_00 | PCR_COMPAT_2_07
> > - | PCR_COMPAT_2_06 | PCR_COMPAT_2_05);
> > - }
> > #endif /* defined(TARGET_PPC64) */
> > }
> >
> > diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> > index 783bf98..a41fe66 100644
> > --- a/target/ppc/translate_init.c
> > +++ b/target/ppc/translate_init.c
> > @@ -8811,6 +8811,8 @@ static struct ppc_radix_page_info
> > POWER9_radix_page_info = {
> >
> > static void init_proc_POWER9(CPUPPCState *env)
> > {
> > + PowerPCCPU *cpu = ppc_env_get_cpu(env);
> > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
> > /* Common Registers */
> > init_proc_book3s_common(env);
> > gen_spr_book3s_207_dbg(env);
> > @@ -8848,7 +8850,18 @@ static void init_proc_POWER9(CPUPPCState *env)
> >
> > /* Allocate hardware IRQ controller */
> > init_excp_POWER8(env);
> > - ppcPOWER7_irq_init(ppc_env_get_cpu(env));
> > + ppcPOWER7_irq_init(cpu);
> > +
> > + if ((pcc->pvr & 0xffffff00) == CPU_POWERPC_POWER9_DD1) {
> > + /*
> > + * POWER9 DD1 has some bugs which make it not really ISA 3.00
> > + * compliant. More importantly, advertising ISA 3.00
> > + * architected mode may prevent guests from activating
> > + * necessary DD1 workarounds.
> > + */
> > + pcc->pcr_supported &= ~(PCR_COMPAT_3_00 | PCR_COMPAT_2_07
> > + | PCR_COMPAT_2_06 | PCR_COMPAT_2_05);
> > + }
> > }
> >
> > static bool ppc_pvr_match_power9(PowerPCCPUClass *pcc, uint32_t pvr)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH v4 0/2] target/ppc/cpu-models: set POWER9_v1.0 as POWER9 DD1, Laurent Vivier, 2017/07/04
- [Qemu-ppc] [PATCH v4 1/2] target/ppc/cpu-models: set POWER9_v1.0 as POWER9 DD1, Laurent Vivier, 2017/07/04
- [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Laurent Vivier, 2017/07/04
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Thomas Huth, 2017/07/04
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Greg Kurz, 2017/07/04
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(),
David Gibson <=
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Greg Kurz, 2017/07/04
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Thomas Huth, 2017/07/04
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), David Gibson, 2017/07/05
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Thomas Huth, 2017/07/05
- Re: [Qemu-ppc] [PATCH v4 2/2] target/ppc: move POWER9 DD1 workaround to init_proc_POWER9(), Greg Kurz, 2017/07/05