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Re: [Qemu-ppc] [PATCH RFC v1 0/3] Enable MTTCG on PPC64


From: Cédric Le Goater
Subject: Re: [Qemu-ppc] [PATCH RFC v1 0/3] Enable MTTCG on PPC64
Date: Thu, 6 Apr 2017 15:26:17 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0

Hello Nikunj,

On 04/06/2017 12:22 PM, Nikunj A Dadhania wrote:
> The series enables Multi-Threaded TCG on PPC64
> 
> Patch 01: Use atomic_cmpxchg in store conditional
>       02: Handle first write to page during atomic operation
>       03: Generate memory barriers for sync/isync and load/store conditional
> 
> Patches are based on ppc-for-2.10
> 
> Tested using following:
> ./ppc64-softmmu/qemu-system-ppc64 -cpu POWER8 -vga none -nographic -machine 
> pseries,usb=off -m 2G  -smp 8,cores=8,threads=1 -accel tcg,thread=multi  
> f23.img

I tried it with a Ubuntu 16.04.2 guest using stress --cpu 8. It looked 
good : the CPU usage of QEMU reached 760% on the host.

> Todo:
> * Enable other machine types and PPC32.

I am quite ignorant on the topic. Have you looked at what it would
take to emulate support of the HW threads ? and the PowerNV machine ?

Thanks,

C. 

> * More testing for corner cases.
> 
> Nikunj A Dadhania (3):
>   target/ppc: Emulate LL/SC using cmpxchg helpers
>   cputlb: handle first atomic write to the page
>   target/ppc: Generate fence operations
> 
>  cputlb.c               |  8 +++++++-
>  target/ppc/translate.c | 29 ++++++++++++++++++++++++++---
>  2 files changed, 33 insertions(+), 4 deletions(-)
> 




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