[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH v4 5/8] target/ppc: Implement H_REGISTER_PROCESS_TABLE
From: |
Sam Bobroff |
Subject: |
[Qemu-ppc] [PATCH v4 5/8] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL |
Date: |
Thu, 16 Mar 2017 17:08:17 +1100 |
From: Suraj Jitindar Singh <address@hidden>
The H_REGISTER_PROCESS_TABLE H_CALL is used by a guest to indicate to the
hypervisor where in memory its process table is and how translation should
be performed using this process table.
Provide the implementation of this H_CALL for a guest.
We first check for invalid flags, then parse the flags to determine the
operation, and then check the other parameters for valid values based on
the operation (register new table/deregister table/maintain registration).
The process table is then stored in the appropriate location and registered
with the hypervisor (if running under KVM), and the LPCR_[UPRT/GTSE] bits
are updated as required.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Signed-off-by: Sam Bobroff <address@hidden>
---
Changes in v4:
* h_register_process_table(): Moved bit ops out of macro definitions and
associated code reorganization.
hw/ppc/spapr.c | 5 ++-
hw/ppc/spapr_hcall.c | 120 +++++++++++++++++++++++++++++++++++++++++++++++--
include/hw/ppc/spapr.h | 1 +
target/ppc/kvm.c | 19 ++++++++
target/ppc/kvm_ppc.h | 2 +
5 files changed, 143 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index f264773e11..8f14914eea 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -40,6 +40,7 @@
#include "kvm_ppc.h"
#include "migration/migration.h"
#include "mmu-hash64.h"
+#include "mmu-book3s-v3.h"
#include "qom/cpu.h"
#include "hw/boards.h"
@@ -1112,7 +1113,7 @@ static int get_htab_fd(sPAPRMachineState *spapr)
return spapr->htab_fd;
}
-static void close_htab_fd(sPAPRMachineState *spapr)
+void close_htab_fd(sPAPRMachineState *spapr)
{
if (spapr->htab_fd >= 0) {
close(spapr->htab_fd);
@@ -1248,6 +1249,8 @@ void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr)
spapr->rma_size = kvmppc_rma_size(spapr_node0_size(),
spapr->htab_shift);
}
+ /* We're setting up a hash table, so that means we're not radix */
+ spapr->patb_entry = 0;
}
static void find_unknown_sysbus_device(SysBusDevice *sbdev, void *opaque)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 6bf2e31fc2..3d9bb0afa6 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -12,6 +12,8 @@
#include "trace.h"
#include "kvm_ppc.h"
#include "hw/ppc/spapr_ovec.h"
+#include "qemu/error-report.h"
+#include "mmu-book3s-v3.h"
struct SPRSyncState {
int spr;
@@ -894,14 +896,126 @@ static target_ulong h_invalidate_pid(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
return H_FUNCTION;
}
+static void spapr_check_setup_free_hpt(sPAPRMachineState *spapr,
+ uint64_t patbe_old, uint64_t patbe_new)
+{
+ /*
+ * We have 4 Options:
+ * HASH->HASH || RADIX->RADIX || NOTHING->RADIX : Do Nothing
+ * HASH->RADIX : Free HPT
+ * RADIX->HASH : Allocate HPT
+ * NOTHING->HASH : Allocate HPT
+ * Note: NOTHING implies the case where we said the guest could choose
+ * later and so assumed radix and now it's called H_REG_PROC_TBL
+ */
+
+ if ((patbe_old & PATBE1_GR) == (patbe_new & PATBE1_GR)) {
+ /* We assume RADIX, so this catches all the "Do Nothing" cases */
+ } else if (!(patbe_old & PATBE1_GR)) {
+ /* HASH->RADIX : Free HPT */
+ g_free(spapr->htab);
+ spapr->htab = NULL;
+ spapr->htab_shift = 0;
+ close_htab_fd(spapr);
+ } else if (!(patbe_new & PATBE1_GR)) {
+ /* RADIX->HASH || NOTHING->HASH : Allocate HPT */
+ spapr_setup_hpt_and_vrma(spapr);
+ }
+ return;
+}
+
+#define FLAGS_MASK 0x01FULL
+#define FLAG_MODIFY 0x10
+#define FLAG_REGISTER 0x08
+#define FLAG_RADIX 0x04
+#define FLAG_HASH_PROC_TBL 0x02
+#define FLAG_GTSE 0x01
+
static target_ulong h_register_process_table(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
target_ulong opcode,
target_ulong *args)
{
- qemu_log_mask(LOG_UNIMP, "Unimplemented SPAPR hcall 0x" TARGET_FMT_lx
"%s\n",
- opcode, " (H_REGISTER_PROC_TBL)");
- return H_FUNCTION;
+ CPUPPCState *env = &cpu->env;
+ target_ulong flags = args[0];
+ target_ulong proc_tbl = args[1];
+ target_ulong page_size = args[2];
+ target_ulong table_size = args[3];
+ uint64_t cproc;
+
+ if (flags & ~FLAGS_MASK) { /* Check no reserved bits are set */
+ return H_PARAMETER;
+ }
+ if (flags & FLAG_MODIFY) {
+ if (flags & FLAG_REGISTER) {
+ if (flags & FLAG_RADIX) { /* Register new RADIX process table */
+ if (proc_tbl & 0xfff || proc_tbl >> 60) {
+ return H_P2;
+ } else if (page_size) {
+ return H_P3;
+ } else if (table_size > 24) {
+ return H_P4;
+ }
+ cproc = PATBE1_GR | proc_tbl | table_size;
+ } else { /* Register new HPT process table */
+ if (flags & FLAG_HASH_PROC_TBL) { /* Hash with Segment Tables
*/
+ /* TODO - Not Supported */
+ /* Technically caused by flag bits => H_PARAMETER */
+ return H_PARAMETER;
+ } else { /* Hash with SLB */
+ if (proc_tbl >> 38) {
+ return H_P2;
+ } else if (page_size & ~0x7) {
+ return H_P3;
+ } else if (table_size > 24) {
+ return H_P4;
+ }
+ }
+ cproc = (proc_tbl << 25) | page_size << 5 | table_size;
+ }
+
+ } else { /* Deregister current process table */
+ /* Set to benign value: (current GR) | 0. This allows
+ * deregistration in KVM to succeed even if the radix bit in flags
+ * doesn't match the radix bit in the old PATB. */
+ cproc = spapr->patb_entry & PATBE1_GR;
+ }
+ } else { /* Maintain current registration */
+ if (!(flags & FLAG_RADIX) != !(spapr->patb_entry & PATBE1_GR)) {
+ /* Technically caused by flag bits => H_PARAMETER */
+ return H_PARAMETER; /* Existing Process Table Mismatch */
+ }
+ cproc = spapr->patb_entry;
+ }
+
+ /* Check if we need to setup OR free the hpt */
+ spapr_check_setup_free_hpt(spapr, spapr->patb_entry, cproc);
+
+ spapr->patb_entry = cproc; /* Save new process table */
+ if ((flags & FLAG_RADIX) || (flags & FLAG_HASH_PROC_TBL)) {
+ /* Use Process TBL */
+ env->spr[SPR_LPCR] |= LPCR_UPRT;
+ } else {
+ env->spr[SPR_LPCR] &= ~LPCR_UPRT;
+ }
+ if (flags & FLAG_GTSE) { /* Partition Uses Guest Translation Shootdwn */
+ env->spr[SPR_LPCR] |= LPCR_GTSE;
+ } else {
+ env->spr[SPR_LPCR] &= ~LPCR_GTSE;
+ }
+
+ if (kvm_enabled()) {
+ uint64_t cflags = 0;
+
+ if (flags & FLAG_RADIX) {
+ cflags |= KVM_PPC_MMUV3_RADIX;
+ }
+ if (flags & FLAG_GTSE) {
+ cflags |= KVM_PPC_MMUV3_GTSE;
+ }
+ return kvmppc_configure_v3_mmu(cpu, cflags, cproc);
+ }
+ return H_SUCCESS;
}
#define H_SIGNAL_SYS_RESET_ALL -1
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 8058ba2208..d234efcd29 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -608,6 +608,7 @@ void spapr_dt_events(sPAPRMachineState *sm, void *fdt);
int spapr_h_cas_compose_response(sPAPRMachineState *sm,
target_ulong addr, target_ulong size,
sPAPROptionVector *ov5_updates);
+void close_htab_fd(sPAPRMachineState *spapr);
void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr);
sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn);
void spapr_tce_table_enable(sPAPRTCETable *tcet,
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 0f0051eeb9..a5ea4829de 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -361,6 +361,25 @@ struct ppc_radix_page_info *kvm_get_radix_page_info(void)
return radix_page_info;
}
+target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, uint64_t flags,
+ uint64_t proc_tbl)
+{
+ CPUState *cs = CPU(cpu);
+ int ret;
+ struct kvm_ppc_mmuv3_cfg cfg = {
+ .flags = flags,
+ .process_table = proc_tbl,
+ };
+
+ ret = kvm_vm_ioctl(cs->kvm_state, KVM_PPC_CONFIGURE_V3_MMU, &cfg);
+ switch (ret) {
+ case 0: return H_SUCCESS;
+ case -EINVAL: return H_PARAMETER;
+ case -ENODEV: return H_NOT_AVAILABLE;
+ default: return H_HARDWARE;
+ }
+}
+
static bool kvm_valid_page_size(uint32_t flags, long rampgsize, uint32_t shift)
{
if (!(flags & KVM_PPC_PAGE_SIZES_REAL)) {
diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
index 64189a48fa..6e0039ff41 100644
--- a/target/ppc/kvm_ppc.h
+++ b/target/ppc/kvm_ppc.h
@@ -33,6 +33,8 @@ int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
int kvmppc_set_tcr(PowerPCCPU *cpu);
int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
+target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, uint64_t flags,
+ uint64_t proctbl);
#ifndef CONFIG_USER_ONLY
off_t kvmppc_alloc_rma(void **rma);
bool kvmppc_spapr_use_multitce(void);
--
2.11.0
- Re: [Qemu-ppc] [PATCH v4 3/8] spapr: Only setup HPT if necessary, (continued)
- [Qemu-ppc] [PATCH v4 1/8] spapr: Add ibm, processor-radix-AP-encodings to the device tree, Sam Bobroff, 2017/03/16
- [Qemu-ppc] [PATCH v4 8/8] spapr: Workaround for broken radix guests, Sam Bobroff, 2017/03/16
- [Qemu-ppc] [PATCH v4 6/8] spapr: move spapr_populate_pa_features(), Sam Bobroff, 2017/03/16
- [Qemu-ppc] [PATCH v4 7/8] spapr: Enable ISA 3.0 MMU mode selection via CAS, Sam Bobroff, 2017/03/16
- [Qemu-ppc] [PATCH v4 5/8] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL,
Sam Bobroff <=
- Re: [Qemu-ppc] [PATCH v4 0/8] ISA 3.00 KVM guest support, David Gibson, 2017/03/17