[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 080/107] target-ppc: Add xvxexpdp instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 080/107] target-ppc: Add xvxexpdp instruction |
Date: |
Thu, 2 Feb 2017 16:14:18 +1100 |
From: Nikunj A Dadhania <address@hidden>
xvxexpdp: VSX Vector Extract Exponent Dual Precision
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate/vsx-impl.inc.c | 17 +++++++++++++++++
target/ppc/translate/vsx-ops.inc.c | 1 +
2 files changed, 18 insertions(+)
diff --git a/target/ppc/translate/vsx-impl.inc.c
b/target/ppc/translate/vsx-impl.inc.c
index 160a80c..7b26f75 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -1413,6 +1413,23 @@ static void gen_xvxexpsp(DisasContext *ctx)
tcg_gen_andi_i64(xtl, xtl, 0xFF000000FF);
}
+static void gen_xvxexpdp(DisasContext *ctx)
+{
+ TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode));
+ TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode));
+ TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode));
+ TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode));
+
+ if (unlikely(!ctx->vsx_enabled)) {
+ gen_exception(ctx, POWERPC_EXCP_VSXU);
+ return;
+ }
+ tcg_gen_shri_i64(xth, xbh, 52);
+ tcg_gen_andi_i64(xth, xth, 0x7FF);
+ tcg_gen_shri_i64(xtl, xbl, 52);
+ tcg_gen_andi_i64(xtl, xtl, 0x7FF);
+}
+
#undef GEN_XX2FORM
#undef GEN_XX3FORM
#undef GEN_XX2IFORM
diff --git a/target/ppc/translate/vsx-ops.inc.c
b/target/ppc/translate/vsx-ops.inc.c
index eb7334a..a3061ce 100644
--- a/target/ppc/translate/vsx-ops.inc.c
+++ b/target/ppc/translate/vsx-ops.inc.c
@@ -126,6 +126,7 @@ GEN_VSX_XFORM_300(xsiexpqp, 0x4, 0x1B, 0x00000001),
GEN_XX3FORM(xviexpsp, 0x00, 0x1B, PPC2_ISA300),
GEN_XX3FORM(xviexpdp, 0x00, 0x1F, PPC2_ISA300),
+GEN_XX2FORM_EO(xvxexpdp, 0x16, 0x1D, 0x00, PPC2_ISA300),
GEN_XX2FORM_EO(xvxexpsp, 0x16, 0x1D, 0x08, PPC2_ISA300),
GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
--
2.9.3
- [Qemu-ppc] [PULL 076/107] target-ppc: Add xsiexpqp instruction, (continued)
- [Qemu-ppc] [PULL 076/107] target-ppc: Add xsiexpqp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 083/107] target-ppc: Add xscvqps[d, w]z instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 104/107] target/ppc/mmu_hash64: Fix printing unsigned as signed int, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 088/107] target-ppc: Add xscvsdqp and xscvudqp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 102/107] target/ppc/debug: Print LPCR register value if register exists, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 077/107] target-ppc: Add xviexpsp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 090/107] target-ppc: Add xsmulqp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 100/107] target-ppc: Add xvtstdc[sp, dp] instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 086/107] ppc: Implement bcdutrunc. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 089/107] target-ppc: Add xsdivqp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 080/107] target-ppc: Add xvxexpdp instruction,
David Gibson <=
- [Qemu-ppc] [PULL 095/107] spapr: clock should count only if vm is running, David Gibson, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Mark Cave-Ayland, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Laurent Vivier, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Mark Cave-Ayland, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Laurent Vivier, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Mark Cave-Ayland, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Laurent Vivier, 2017/02/07
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Mark Cave-Ayland, 2017/02/09
- Re: [Qemu-ppc] [Qemu-devel] [PULL 095/107] spapr: clock should count only if vm is running, Laurent Vivier, 2017/02/09
[Qemu-ppc] [PULL 078/107] target-ppc: Add xviexpdp instruction, David Gibson, 2017/02/02