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[Qemu-ppc] [PULL 021/107] target-ppc: implement stop instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 021/107] target-ppc: implement stop instruction |
Date: |
Thu, 2 Feb 2017 16:13:19 +1100 |
From: Nikunj A Dadhania <address@hidden>
Use the nap code.
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 87fc153..772929e 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3172,6 +3172,11 @@ static void gen_nap(DisasContext *ctx)
#endif /* defined(CONFIG_USER_ONLY) */
}
+static void gen_stop(DisasContext *ctx)
+{
+ gen_nap(ctx);
+}
+
static void gen_sleep(DisasContext *ctx)
{
#if defined(CONFIG_USER_ONLY)
@@ -6240,6 +6245,7 @@ GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001,
PPC_INTEGER),
GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW),
#if defined(TARGET_PPC64)
GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B),
+GEN_HANDLER_E(stop, 0x13, 0x12, 0x0b, 0x03FFF801, PPC_NONE, PPC2_ISA300),
GEN_HANDLER_E(doze, 0x13, 0x12, 0x0c, 0x03FFF801, PPC_NONE, PPC2_PM_ISA206),
GEN_HANDLER_E(nap, 0x13, 0x12, 0x0d, 0x03FFF801, PPC_NONE, PPC2_PM_ISA206),
GEN_HANDLER_E(sleep, 0x13, 0x12, 0x0e, 0x03FFF801, PPC_NONE, PPC2_PM_ISA206),
--
2.9.3
- [Qemu-ppc] [PULL 001/107] disas/ppc: Fix indefinite articles in comments, (continued)
- [Qemu-ppc] [PULL 001/107] disas/ppc: Fix indefinite articles in comments, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 003/107] target-ppc: rename CRF_* defines as CRF_*_BIT, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 011/107] target-ppc: Implement bcdctsq. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 002/107] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 010/107] target-ppc: Implement bcdcfsq. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 006/107] target-ppc: Add xscmpoqp and xscmpuqp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 008/107] target-ppc: implement stxsd and stxssp, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 020/107] target-ppc: move ppc_vsr_t to common header, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 014/107] target-ppc: add vextu[bhw][lr]x instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 005/107] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 021/107] target-ppc: implement stop instruction,
David Gibson <=
- [Qemu-ppc] [PULL 016/107] pseries: Make cpu_update during CAS unconditional, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 018/107] ppc: Rename cpu_version to compat_pvr, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 013/107] target-ppc: Implement bcdsetsgn. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 024/107] target-ppc: implement xsnegqp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 022/107] target-ppc: implement xsabsqp/xsnabsqp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 012/107] target-ppc: Implement bcdcpsgn. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 036/107] ppc: Validate compatibility modes when setting, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 009/107] target-ppc: implement lxv/lxvx and stxv/stxvx, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 019/107] ppc/spapr: implement H_SIGNAL_SYS_RESET, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 025/107] target-ppc: implement xscpsgnqp instruction, David Gibson, 2017/02/02