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[Qemu-ppc] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the retur
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the return address |
Date: |
Tue, 6 Sep 2016 13:42:33 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
Instead of relying on NIP having been updated already
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/fpu_helper.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index e1f600a..8d881fc 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#define float64_snan_to_qnan(x) ((x) | 0x0008000000000000ULL)
#define float32_snan_to_qnan(x) ((x) | 0x00400000)
@@ -200,8 +201,9 @@ static inline uint64_t float_invalid_op_excp(CPUPPCState
*env, int op,
/* Update the floating-point enabled exception summary */
env->fpscr |= 1 << FPSCR_FEX;
if (msr_fe0 != 0 || msr_fe1 != 0) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_FP | op);
+ /* GETPC() works here because this is inline */
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_FP | op, GETPC());
}
}
return ret;
--
2.7.4
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/66] ppc-for-2.8 queue 20160906, (continued)
[Qemu-ppc] [PULL 00/66] ppc-for-2.8 queue 20160906, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 01/66] xics_kvm: drop extra checking of kernel_xics_fd, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 04/66] target-ppc: Introduce POWER ISA 3.0 flag, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 03/66] target-ppc: Introduce Power9 family, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 09/66] target-ppc: add cnttzd[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the return address,
David Gibson <=
- [Qemu-ppc] [PULL 06/66] target-ppc: add cmprb instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 15/66] target-ppc: introduce opc4 for Expanded Opcode, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 12/66] target-ppc: add setb instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 14/66] target-ppc: add maddhd and maddhdu instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 08/66] target-ppc: add modulo dword operations, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 02/66] hw/ppc: include fdt helper routine in a common file, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 16/66] ppc: Provide basic raise_exception_* functions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 44/66] ppc: load/store multiple and string insns don't do LE, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 37/66] ppc: Don't update NIP in dcbz and lscbx, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 10/66] target-ppc: add cnttzw[.] instruction, David Gibson, 2016/09/05