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[Qemu-ppc] [PATCH 0/5] POWER9 TCG enablement - part3
From: |
Rajalakshmi Srinivasaraghavan |
Subject: |
[Qemu-ppc] [PATCH 0/5] POWER9 TCG enablement - part3 |
Date: |
Mon, 1 Aug 2016 12:49:37 +0530 |
This series contains 14 new instructions for POWER9 described in ISA3.0.
Patches:
01: Adds vector insert instructions.
vinsertb - Vector Insert Byte
vinserth - Vector Insert Halfword
vinsertw - Vector Insert Word
vinsertd - Vector Insert Doubleword
02: Adds vector extract instructions.
vextractub - Vector Extract Unsigned Byte
vextractuh - Vector Extract Unsigned Halfword
vextractuw - Vector Extract Unsigned Word
vextractd - Vector Extract Unsigned Doubleword
03: Adds vector count trailing zeros instructions.
vctzb - Vector Count Trailing Zeros Byte
vctzh - Vector Count Trailing Zeros Halfword
vctzw - Vector Count Trailing Zeros Word
vctzd - Vector Count Trailing Zeros Doubleword
04: Adds vbpermd-vector bit permute doubleword instruction.
05: Adds vpermr-vector permute right indexed instruction.
target-ppc/helper.h | 14 +++++
target-ppc/int_helper.c | 110 +++++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.c | 58 ++++++++++++++++++++
target-ppc/translate/vmx-ops.c | 39 +++++++++++---
4 files changed, 213 insertions(+), 8 deletions(-)
- [Qemu-ppc] [PATCH 0/5] POWER9 TCG enablement - part3,
Rajalakshmi Srinivasaraghavan <=
- [Qemu-ppc] [PATCH 1/5] target-ppc: add vector insert instructions, Rajalakshmi Srinivasaraghavan, 2016/08/01
- [Qemu-ppc] [PATCH 2/5] target-ppc: add vector extract instructions, Rajalakshmi Srinivasaraghavan, 2016/08/01
- [Qemu-ppc] [PATCH 3/5] target-ppc: add vector count trailing zeros instructions, Rajalakshmi Srinivasaraghavan, 2016/08/01
- [Qemu-ppc] [PATCH 4/5] target-ppc: add vector bit permute doubleword instruction, Rajalakshmi Srinivasaraghavan, 2016/08/01
- [Qemu-ppc] [PATCH 5/5] target-ppc: add vector permute right indexed instruction, Rajalakshmi Srinivasaraghavan, 2016/08/01