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[Qemu-ppc] [PATCH v3 03/10] ppc: Add a bunch of hypervisor SPRs to Book3
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH v3 03/10] ppc: Add a bunch of hypervisor SPRs to Book3s |
Date: |
Mon, 21 Mar 2016 13:52:33 +0100 |
From: Benjamin Herrenschmidt <address@hidden>
We don't give them a KVM reg number to most of the registers yet as no
current KVM version supports HV mode. For DAWR and DAWRX, the KVM reg
number is needed since this register can be set by the guest via the
H_SET_MODE hypercall.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
[clg: squashed in patch 'ppc: Add KVM numbers to some P8 SPRs'
changed the commit log with a proposal of Thomas Huth
removed all hunks except those related to AMOR and DAWR* ]
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: David Gibson <address@hidden>
---
target-ppc/translate_init.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6a11b41206e5..4cb3dd5076c1 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -1105,6 +1105,11 @@ static void gen_spr_amr (CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_UAMOR, 0);
+ spr_register_hv(env, SPR_AMOR, "AMOR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ 0);
#endif /* !CONFIG_USER_ONLY */
}
#endif /* TARGET_PPC64 */
@@ -7491,6 +7496,20 @@ static void gen_spr_book3s_dbg(CPUPPCState *env)
KVM_REG_PPC_DABRX, 0x00000000);
}
+static void gen_spr_book3s_207_dbg(CPUPPCState *env)
+{
+ spr_register_kvm_hv(env, SPR_DAWR, "DAWR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_DAWR, 0x00000000);
+ spr_register_kvm_hv(env, SPR_DAWRX, "DAWRX",
+ SPR_NOACCESS, SPR_NOACCESS,
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ KVM_REG_PPC_DAWRX, 0x00000000);
+}
+
static void gen_spr_970_dbg(CPUPPCState *env)
{
/* Breakpoints */
@@ -7960,6 +7979,8 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
}
if (version < BOOK3S_CPU_POWER8) {
gen_spr_book3s_dbg(env);
+ } else {
+ gen_spr_book3s_207_dbg(env);
}
#if !defined(CONFIG_USER_ONLY)
switch (version) {
--
2.1.4
- [Qemu-ppc] [PATCH v3 00/10] ppc: preparing pnv landing, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 02/10] ppc: Add macros to register hypervisor mode SPRs, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 05/10] ppc: Add dummy SPR_IC for POWER8, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 01/10] ppc: Update SPR definitions, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 06/10] ppc: Initialize AMOR in PAPR mode, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 03/10] ppc: Add a bunch of hypervisor SPRs to Book3s,
Cédric Le Goater <=
- [Qemu-ppc] [PATCH v3 04/10] ppc: Create cpu_ppc_set_papr() helper, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 07/10] ppc: Fix writing to AMR/UAMOR, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 08/10] ppc: Add POWER8 IAMR register, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 10/10] ppc: A couple more dummy POWER8 Book4 regs, Cédric Le Goater, 2016/03/21
- [Qemu-ppc] [PATCH v3 09/10] ppc: Add dummy CIABR SPR, Cédric Le Goater, 2016/03/21