Re: [Qemu-ppc] [PATCHv2 06/10] target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one

[Benjamin Herrenschmidt]

On Wed, 2016-01-27 at 21:13 +1100, David Gibson wrote:
> ppc_tlb_invalidate_one() has a big switch handling many different MMU
> types.  However, most of those branches can never be reached:
> 
> It is called from 3 places: from remove_hpte() and h_protect() in
> spapr_hcall.c (which always has a 64-bit hash MMU type), and from
> helper_tlbie() in mmu_helper.c.
> 
> Calls to helper_tlbie() are generated from gen_tlbiel, gen_tlbiel and
> gen_tlbiva.  The first two are only used with the PPC_MEM_TLBIE flag,
> set only with 32-bit or 64-bit hash MMU models, and gen_tlbiva() is
> used only on 440 and 460 models with the BookE mmu model.
> 
> These means the exhaustive list of MMU types which may call
> ppc_tlb_invalidate_one() is: POWERPC_MMU_SOFT_6xx, POWERPC_MMU_601,
> POWERPC_MMU_32B, POWERPC_MMU_SOFT_74xx, POWERPC_MMU_64B,
> POWERPC_MMU_2_03,
> POWERPC_MMU_2_06, POWERPC_MMU_2_07 and POWERPC_MMU_BOOKE.
> 
> Clean up by removing logic for all other MMU types from
> ppc_tlb_invalidate_one().

I would argue to move hash64 out of it as well anyway. First what we do
in there is dumb, but the way I change it with lazy inval differs and
tlbie does provide additional information on server processors that
we would need should we chose to implemented fine grained invalidations
(such as the page size).

In the meantime:

Acked-by: Benjamin Herrenschmidt <address@hidden>

> Signed-off-by: David Gibson <address@hidden>
> ---
>  target-ppc/mmu_helper.c | 20 ++------------------
>  1 file changed, 2 insertions(+), 18 deletions(-)
> 
> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> index c040b17..82ebe5d 100644
> --- a/target-ppc/mmu_helper.c
> +++ b/target-ppc/mmu_helper.c
> @@ -1971,25 +1971,10 @@ void ppc_tlb_invalidate_one(CPUPPCState *env,
> target_ulong addr)
>              ppc6xx_tlb_invalidate_virt(env, addr, 1);
>          }
>          break;
> -    case POWERPC_MMU_SOFT_4xx:
> -    case POWERPC_MMU_SOFT_4xx_Z:
> -        ppc4xx_tlb_invalidate_virt(env, addr, env-
> >spr[SPR_40x_PID]);
> -        break;
> -    case POWERPC_MMU_REAL:
> -        cpu_abort(CPU(cpu), "No TLB for PowerPC 4xx in real
> mode\n");
> -        break;
> -    case POWERPC_MMU_MPC8xx:
> -        /* XXX: TODO */
> -        cpu_abort(CPU(cpu), "MPC8xx MMU model is not
> implemented\n");
> -        break;
>      case POWERPC_MMU_BOOKE:
>          /* XXX: TODO */
>          cpu_abort(CPU(cpu), "BookE MMU model is not implemented\n");
>          break;
> -    case POWERPC_MMU_BOOKE206:
> -        /* XXX: TODO */
> -        cpu_abort(CPU(cpu), "BookE 2.06 MMU model is not
> implemented\n");
> -        break;
>      case POWERPC_MMU_32B:
>      case POWERPC_MMU_601:
>          /* tlbie invalidate TLBs for all segments */
> @@ -2031,9 +2016,8 @@ void ppc_tlb_invalidate_one(CPUPPCState *env,
> target_ulong addr)
>          break;
>  #endif /* defined(TARGET_PPC64) */
>      default:
> -        /* XXX: TODO */
> -        cpu_abort(CPU(cpu), "Unknown MMU model\n");
> -        break;
> +        /* Should never reach here with other MMU models */
> +        assert(0);
>      }
>  #else
>      ppc_tlb_invalidate_all(env);