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[Qemu-ppc] [PATCH 68/77] ppc: Add dummy POWER8 MPPR register
From: |
Benjamin Herrenschmidt |
Subject: |
[Qemu-ppc] [PATCH 68/77] ppc: Add dummy POWER8 MPPR register |
Date: |
Wed, 11 Nov 2015 11:28:21 +1100 |
Controls the micropartition prefetch, this is pretty much meaningless
in full emulation (used for priming the caches on real HW).
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f7e653b..253d04b 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1399,6 +1399,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
ifetch)
#define SPR_DHDES (0x0B1)
#define SPR_DPDES (0x0B0)
#define SPR_DAWR (0x0B4)
+#define SPR_MPPR (0x0B8)
#define SPR_RPR (0x0BA)
#define SPR_DAWRX (0x0BC)
#define SPR_HFSCR (0x0BE)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 4ad2c94..a178696 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8212,6 +8212,18 @@ static void gen_spr_power8_ic(CPUPPCState *env)
#endif
}
+static void gen_spr_power8_book4(CPUPPCState *env)
+{
+ /* Add a number of P8 book4 registers */
+#if !defined(CONFIG_USER_ONLY)
+ spr_register_hv(env, SPR_MPPR, "MPPR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ 0);
+#endif
+}
+
static void init_proc_book3s_64(CPUPPCState *env, int version)
{
gen_spr_ne_601(env);
@@ -8266,6 +8278,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
gen_spr_power8_rpr(env);
gen_spr_power8_dbell(env);
gen_spr_power8_ic(env);
+ gen_spr_power8_book4(env);
}
if (version < BOOK3S_CPU_POWER8) {
gen_spr_book3s_dbg(env);
--
2.5.0
- [Qemu-ppc] [PATCH 56/77] ppc: Fix conditions for delivering external interrupts to a guest, (continued)
- [Qemu-ppc] [PATCH 56/77] ppc: Fix conditions for delivering external interrupts to a guest, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 54/77] ppc: Fix 64K pages support in full emulation, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 58/77] ppc: Initial HDEC support, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 59/77] ppc: Add placeholder SPRs for DPDES and DHDES on P8, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 62/77] ppc: Add dummy SPR_IC for POWER8, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 60/77] ppc: LPCR is a HV resource, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 64/77] ppc: Fix writing to AMR/UAMOR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 65/77] ppc: Add POWER8 IAMR register, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 67/77] ppc: Add dummy write to VTB, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 66/77] ppc: Add a few more P8 PMU SPRs, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 68/77] ppc: Add dummy POWER8 MPPR register,
Benjamin Herrenschmidt <=
- [Qemu-ppc] [PATCH 72/77] ppc: A couple more dummy POWER8 Book4 regs, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 77/77] ppc: Fix CFAR updates, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 70/77] ppc: Add dummy CIABR SPR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 69/77] ppc: Add dummy POWER8 PSPB SPR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 71/77] ppc: Add dummy ACOP SPR, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 73/77] ppc: Add KVM numbers to some P8 SPRs, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 74/77] ppc: Print HSRR0/HSRR1 in "info registers", Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 76/77] ppc: Add slbfee. instruction, Benjamin Herrenschmidt, 2015/11/10
- [Qemu-ppc] [PATCH 75/77] ppc: Add dummy logmpp instruction, Benjamin Herrenschmidt, 2015/11/10
- Re: [Qemu-ppc] [PATCH 00/77] ppc: Add "native" POWER8 platform, Benjamin Herrenschmidt, 2015/11/10