Hi,
I need to add floating point and double precision ability to PPC440x5 which have an optional APU FPU.
I have therefore a few questions prior to posting any patch :
1) Is adding PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX to insns_flags is OK or should I use additional CPU parameters to prevent adding floating point capabilities to all PPC440x5 ?
2) I have encounter some double precision mnemonics that seemed to be reserved to 64bits processor : fctidz for instance. Translate macro definition of such mnemonics are reserved to TARGET_PPC64 and mnemonics type required to have PPC_64B in insns flags.
Since PPC440x5 is a 32bits processor but the APU FPU is able to perform double precision computation I would like to remove TARGET_PPC64 limitation and change type to PPC_FLOAT_DOUBLE to enable 32 bits processor with double precision floating point mnemonics.
By the way, adding the PPC_FLOAT_DOUBLE flag requires to remove one of the PPC_FLOAT flag since there is no much bit available in insns flag, I have done this by setting PPC_FLOAT_FRES and PPC_FLOAT_FSEL to same value since they seem to be always used together.
3) Shall I post the patch and continue the discussion on the patch's thread or is it better to discuss before posting any patch ?
Thanks for your help and advice.
Pierre