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Re: [Qemu-ppc] [Qemu-devel] [PATCH 3/8] target-ppc: Bug Fix: rlwimi
From: |
Richard Henderson |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH 3/8] target-ppc: Bug Fix: rlwimi |
Date: |
Fri, 15 Aug 2014 10:05:57 -1000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.7.0 |
On 08/11/2014 09:23 AM, Tom Musta wrote:
> Also fix the special case of MB=31 and ME=0 to copy the entire contents
> of the source GPR.
Err, that's not what you did.
> if (likely(sh == 0 && mb == 0 && me == 31)) {
> +#if defined(TARGET_PPC64)
> + tcg_gen_mov_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
> +#else
> tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)],
> cpu_gpr[rS(ctx->opcode)]);
> +#endif
This is the reverse condition. Which, true enough, should not be implemented
with ext32u for PPC64. But a MOV isn't right either, it is
deposit(ra, rs, 0, 32)
Which does point out that we should probably implement anything MB <= ME and SH
== 31 - ME with the deposit opcode.
r~
- [Qemu-ppc] [PATCH 0/8] target-ppc: Bug Fixes for 64 Bit FXU Instructions, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 1/8] target-ppc: Bug Fix: rlwinm, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 2/8] target-ppc: Bug Fix: rlwnm, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 3/8] target-ppc: Bug Fix: rlwimi, Tom Musta, 2014/08/11
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 3/8] target-ppc: Bug Fix: rlwimi,
Richard Henderson <=
- [Qemu-ppc] [PATCH 4/8] target-ppc: Bug Fix: mullw, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 5/8] target-ppc: Bug Fix: mullwo, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 6/8] target-ppc: Bug Fix: mulldo OV Detection, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 7/8] target-ppc: Bug Fix: srawi, Tom Musta, 2014/08/11
- [Qemu-ppc] [PATCH 8/8] target-ppc: Bug Fix: srad, Tom Musta, 2014/08/11