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Re: [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfer
From: |
BALATON Zoltan |
Subject: |
Re: [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers |
Date: |
Fri, 20 Jun 2014 21:17:56 +0200 (CEST) |
User-agent: |
Alpine 2.02 (LMD 1266 2009-07-14) |
On Fri, 20 Jun 2014, Mark Cave-Ayland wrote:
Zoltan, please can you test the attached patch to see if this still allows
MorphOS to boot?
Unfortunately it seems MorphOS cannot boot with this patch. It hangs while
trying to read the TOC from the CD. Debug output with DEBUG_MACIO and
DEBUG_DBDMA enabled shows:
DBDMA: writel 0x0000000000000d0c <= 0x00e51970
DBDMA: channel 0x1a reg 0x3
DBDMA: dbdma_cmdptr_load 0x00e51970
DBDMA: DBDMA_run_bh
DBDMA: writel 0x0000000000000d00 <= 0x80008000
DBDMA: channel 0x1a reg 0x0
DBDMA: status 0x00008400
DBDMA: readl 0x0000000000000d00 => 0x80008000
DBDMA: channel 0x1a reg 0x0
DBDMA: DBDMA_run_bh
DBDMA: channel_run
dbdma_cmd 0x7f0997120f28
req_count 0x0324
command 0x3000
phy_addr 0x00e7b0bc
cmd_dep 0x00000000
res_count 0x0000
xfer_status 0x0000
DBDMA: start_input
DBDMA: addr 0xe7b0bc key 0x0
non-block ATAPI DMA transfer size: 804
io_buffer_size = 0
remainder: 0 io->len: 0 size: 20
end of DMA
done DMA
DBDMA: dbdma_end
DBDMA: conditional_wait
DBDMA: dbdma_cmdptr_save 0x00e51970
DBDMA: xfer_status 0x00008400 res_count 0x0000
DBDMA: conditional_interrupt
DBDMA: conditional_branch
DBDMA: dbdma_cmdptr_load 0x00e51980
DBDMA: channel_run
dbdma_cmd 0x7f0997120f28
req_count 0x0000
command 0x7000
phy_addr 0x00000000
cmd_dep 0x00000000
res_count 0x0000
xfer_status 0x0000
and no further ide activity from here whereas without the patch when it
boots I see these logs:
DBDMA: writel 0x0000000000000d0c <= 0x00e50090
DBDMA: channel 0x1a reg 0x3
DBDMA: dbdma_cmdptr_load 0x00e50090
DBDMA: DBDMA_run_bh
DBDMA: writel 0x0000000000000d00 <= 0x80008000
DBDMA: channel 0x1a reg 0x0
DBDMA: status 0x00008400
DBDMA: readl 0x0000000000000d00 => 0x80008000
DBDMA: channel 0x1a reg 0x0
DBDMA: DBDMA_run_bh
DBDMA: channel_run
dbdma_cmd 0x7f56695a7f28
req_count 0x0324
command 0x3000
phy_addr 0x00e4f8fc
cmd_dep 0x00000000
res_count 0x0000
xfer_status 0x0000
DBDMA: start_input
DBDMA: addr 0xe4f8fc key 0x0
non-block ATAPI DMA transfer size: 20
end of non-block ATAPI DMA transfer
DBDMA: dbdma_end
DBDMA: conditional_wait
DBDMA: dbdma_cmdptr_save 0x00e50090
DBDMA: xfer_status 0x00008400 res_count 0x0324
DBDMA: conditional_interrupt
DBDMA: conditional_branch
DBDMA: dbdma_cmdptr_load 0x00e500a0
DBDMA: channel_run
dbdma_cmd 0x7f56695a7f28
req_count 0x0000
command 0x7000
phy_addr 0x00000000
cmd_dep 0x00000000
res_count 0x0000
xfer_status 0x0000
DBDMA: writel 0x0000000000000d00 <= 0x98000000
DBDMA: channel 0x1a reg 0x0
DBDMA: status 0x00000000
DBDMA: writel 0x0000000000000d0c <= 0x00e50090
DBDMA: channel 0x1a reg 0x3
DBDMA: dbdma_cmdptr_load 0x00e50090
DBDMA: writel 0x0000000000000d00 <= 0x80008000
DBDMA: channel 0x1a reg 0x0
DBDMA: status 0x00008400
DBDMA: readl 0x0000000000000d00 => 0x80008000
DBDMA: channel 0x1a reg 0x0
DBDMA: DBDMA_run_bh
DBDMA: channel_run
dbdma_cmd 0x7f56695a7f28
req_count 0x0800
command 0x3000
phy_addr 0x00e8d7c0
cmd_dep 0x00000000
res_count 0x0000
xfer_status 0x0000
DBDMA: start_input
DBDMA: addr 0xe8d7c0 key 0x0
io_buffer_size = 0
remainder: 0 io->len: 2048 size: 2048
io->len = 0x800
set remainder to: 0
sector_num=64 size=2048, cmd_cmd=0
io_buffer_size = 0x800
remainder: 0 io->len: 0 size: 0
end of transfer
end of DMA
done DMA
DBDMA: dbdma_end
DBDMA: conditional_wait
DBDMA: dbdma_cmdptr_save 0x00e50090
DBDMA: xfer_status 0x00008400 res_count 0x0000
DBDMA: conditional_interrupt
DBDMA: conditional_branch
DBDMA: dbdma_cmdptr_load 0x00e500a0
DBDMA: channel_run
dbdma_cmd 0x7f56695a7f28
req_count 0x0000
command 0x7000
phy_addr 0x00000000
cmd_dep 0x00000000
res_count 0x0000
xfer_status 0x0000
and a lot of similar stuff after this. If this is not enough to understand
the problem and you need more details please tell me what to look for.
Regards,
BALATON Zoltan
- [Qemu-ppc] [PULL 066/118] PPC: Fix SPR access control of L1CFG0, (continued)
- [Qemu-ppc] [PULL 066/118] PPC: Fix SPR access control of L1CFG0, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 074/118] spapr: Add ibm, chip-id property in device tree, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 073/118] spapr: Add support for time base offset migration, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 027/118] target-ppc: Introduce Generator Macros for DFP Arithmetic Forms, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 061/118] PPC: e500: implement PCI INTx routing, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 064/118] PPC: Make all e500 CPUs SVR aware, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 050/118] target-ppc: Introduce DFP Insert Biased Exponent, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 058/118] target-ppc: Refactor AES Instructions, Alexander Graf, 2014/06/04
- [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/04
- Re: [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Mark Cave-Ayland, 2014/06/20
- Re: [Qemu-ppc] [PULL 075/118] macio: handle non-block ATAPI DMA transfers,
BALATON Zoltan <=
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Mark Cave-Ayland, 2014/06/20
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, BALATON Zoltan, 2014/06/20
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/23
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, BALATON Zoltan, 2014/06/23
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Mark Cave-Ayland, 2014/06/23
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Kevin Wolf, 2014/06/24
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, BALATON Zoltan, 2014/06/24
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/24
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Kevin Wolf, 2014/06/24
- Re: [Qemu-ppc] [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers, Alexander Graf, 2014/06/24