[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx()
From: |
Tom Musta |
Subject: |
Re: [Qemu-ppc] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx() for 970 |
Date: |
Tue, 03 Jun 2014 11:32:22 -0500 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 6/3/2014 4:27 AM, Alexey Kardashevskiy wrote:
> +static void gen_spr_book3s_pmu_user(CPUPPCState *env)
> +{
> + spr_register(env, SPR_POWER_UMMCR0, "UMMCR0",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + spr_register(env, SPR_POWER_UMMCR1, "UMMCR1",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + spr_register(env, SPR_POWER_UPMC1, "UPMC1",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + spr_register(env, SPR_POWER_UPMC2, "UPMC2",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + spr_register(env, SPR_POWER_UPMC3, "UPMC3",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + spr_register(env, SPR_POWER_UPMC4, "UPMC4",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> + spr_register(env, SPR_POWER_USIAR, "USIAR",
> + &spr_read_ureg, SPR_NOACCESS,
> + &spr_read_ureg, SPR_NOACCESS,
> + 0x00000000);
> +}
The Uxxxx regs are writeable from supervisor state, aren't they? (similar
comment as UCTRL).
There is also this complicating factor in ISA 2.07 (P8) whereby the PMU Uxxxx
SPRs are
readable/writeable based on the state of MMCR0[PMCC] (ick!).
I think either of these can be handled in follow up patches. I am also not
sure that I see a
compelling reason to model the MMCR0[PMCC] accessibility unless we actually
start modeling the
PMU (hard).
Reviewed-by: Tom Musta <address@hidden>
- [Qemu-ppc] [PATCH v4 00/29] book3s powerpc classes (970, power5, power7, power8) rework, Alexey Kardashevskiy, 2014/06/03
- [Qemu-ppc] [PATCH v4 05/29] target-ppc: Add "POWER" prefix to MMCRA PMU registers, Alexey Kardashevskiy, 2014/06/03
- [Qemu-ppc] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx() for 970, Alexey Kardashevskiy, 2014/06/03
- Re: [Qemu-ppc] [PATCH v4 04/29] target-ppc: Copy and split gen_spr_7xx() for 970,
Tom Musta <=
- [Qemu-ppc] [PATCH v4 06/29] target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family, Alexey Kardashevskiy, 2014/06/03
- [Qemu-ppc] [PATCH v4 08/29] target-ppc: Add HID4 SPR for PPC970, Alexey Kardashevskiy, 2014/06/03
- [Qemu-ppc] [PATCH v4 11/29] target-ppc: Enable PMU SPRs migration, Alexey Kardashevskiy, 2014/06/03
- [Qemu-ppc] [PATCH v4 03/29] target-ppc: Refactor PPC970, Alexey Kardashevskiy, 2014/06/03
- [Qemu-ppc] [PATCH v4 01/29] target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs, Alexey Kardashevskiy, 2014/06/03