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[Qemu-ppc] [PULL 2.0 06/15] target-ppc: Correct LE Host Inversion of Low
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 2.0 06/15] target-ppc: Correct LE Host Inversion of Lower VSRs |
Date: |
Tue, 8 Apr 2014 11:31:45 +0200 |
From: Tom Musta <address@hidden>
This change properly orders the doublewords of the VSRs 0-31. Because these
registers are constructed from separate doublewords, they must be inverted
on Little Endian hosts. The inversion is performed both when the VSR is read
and when it is written.
Signed-off-by: Tom Musta <address@hidden>
Tested-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/fpu_helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index d79aae9..9fc7dd8 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -1793,8 +1793,8 @@ typedef union _ppc_vsr_t {
static void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
{
if (n < 32) {
- vsr->f64[0] = env->fpr[n];
- vsr->u64[1] = env->vsr[n];
+ vsr->VsrD(0) = env->fpr[n];
+ vsr->VsrD(1) = env->vsr[n];
} else {
vsr->u64[0] = env->avr[n-32].u64[0];
vsr->u64[1] = env->avr[n-32].u64[1];
@@ -1804,8 +1804,8 @@ static void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState
*env)
static void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
{
if (n < 32) {
- env->fpr[n] = vsr->f64[0];
- env->vsr[n] = vsr->u64[1];
+ env->fpr[n] = vsr->VsrD(0);
+ env->vsr[n] = vsr->VsrD(1);
} else {
env->avr[n-32].u64[0] = vsr->u64[0];
env->avr[n-32].u64[1] = vsr->u64[1];
--
1.8.1.4
- [Qemu-ppc] [PULL 2.0 00/15] ppc patch queue 2014-04-08 for 2.0, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 05/15] target-ppc: Define Endian-Correct Accessors for VSR Field Access, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 01/15] PPC: E500: Set PIR default reset value rather than SPR value, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 03/15] softfloat: Introduce float32_to_uint64_round_to_zero, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 09/15] target-ppc: Correct VSX FP to FP Conversions, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 06/15] target-ppc: Correct LE Host Inversion of Lower VSRs,
Alexander Graf <=
- [Qemu-ppc] [PULL 2.0 10/15] target-ppc: Correct VSX FP to Integer Conversion, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 07/15] target-ppc: Correct Simple VSR LE Host Inversions, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 12/15] PPC: Clean up DECR implementation, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 13/15] PPC: Only enter MSR_POW when no interrupts pending, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 08/15] target-ppc: Correct VSX Scalar Compares, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 11/15] target-ppc: Correct VSX Integer to FP Conversion, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 15/15] PPC: Add l1 cache sizes for 970 and above systems, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 04/15] target-ppc: Bug: VSX Convert to Integer Should Truncate, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 14/15] ppce500_spin: Initialize struct properly, Alexander Graf, 2014/04/08
- [Qemu-ppc] [PULL 2.0 02/15] pseries: Update SLOF firmware image to qemu-slof-20140404, Alexander Graf, 2014/04/08