Re: [Qemu-ppc] [PATCH] target-ppc: reset SPRs on CPU reset

[Greg Kurz]

On Wed, 19 Mar 2014 14:28:02 +1100
Alexey Kardashevskiy <address@hidden> wrote:
> This resets SPR values to defaults on CPU reset. This should help
> with little-endian guests reboot issues.
> 
> Signed-off-by: Alexey Kardashevskiy <address@hidden>
> ---

Yeah ! Since we only set the endianness (LPCR_ILE) when the guest
kernel calls H_SET_MODE_RESOURCE_LE, we indeed have a window where
the guest keeps the endianness from the previous kernel. In case
the guest was running a LE kernel, when we reboot we end up running
SLOF in a LE environment... but SLOF assumes BE and breaks.

Reviewed-by: Greg Kurz <address@hidden>

Andreas,

This is really a bug fix to support LE->BE transition when we
reboot the guest. But first, we should support LE... thanks to:

https://lists.nongnu.org/archive/html/qemu-devel/2014-03/msg01316.html

(especially patch 2/3)

FWIW, there have been a lot of discussions about H_SET_MODE last autumn.
It was decided to kick the hcall out of KVM (now upstream in Linus's
tree with commit d682916a381)... We are halfway through :-\

Could you please consider applying this serie as well ?

Thanks.

--
Greg

>  target-ppc/cpu.h            |  1 +
>  target-ppc/translate_init.c | 12 +++++++++++-
>  2 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 91b7ae5..8c181e7 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -334,6 +334,7 @@ struct ppc_spr_t {
>      void (*hea_write)(void *opaque, int spr_num, int gpr_num);
>  #endif
>      const char *name;
> +    target_ulong default_value;
>  #ifdef CONFIG_KVM
>      /* We (ab)use the fact that all the SPRs will have ids for the
>       * ONE_REG interface will have KVM_REG_PPC to use 0 as meaning,
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 6084f40..c63f4a1 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -631,7 +631,7 @@ static inline void _spr_register(CPUPPCState *env, int 
> num,
>  #if defined(CONFIG_KVM)
>      spr->one_reg_id = one_reg_id,
>  #endif
> -    env->spr[num] = initial_value;
> +    env->spr[num] = spr->default_value = initial_value;
>  }
> 
>  /* Generic PowerPC SPRs */
> @@ -8381,6 +8381,7 @@ static void ppc_cpu_reset(CPUState *s)
>      PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
>      CPUPPCState *env = &cpu->env;
>      target_ulong msr;
> +    int i;
> 
>      pcc->parent_reset(s);
> 
> @@ -8434,6 +8435,15 @@ static void ppc_cpu_reset(CPUState *s)
>      env->dtl_size = 0;
>  #endif /* TARGET_PPC64 */
> 
> +    for (i = 0; i < sizeof(env->spr_cb)/sizeof(env->spr_cb[0]); i++) {
> +        ppc_spr_t *spr = &env->spr_cb[i];
> +
> +        if (!spr->name) {
> +            continue;
> +        }
> +        env->spr[i] = spr->default_value;
> +    }
> +
>      /* Flush all TLBs */
>      tlb_flush(s, 1);
>  }