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[Qemu-ppc] [PULL 035/130] target-ppc: VSX Stage 4: Refactor lxsdx
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 035/130] target-ppc: VSX Stage 4: Refactor lxsdx |
Date: |
Fri, 7 Mar 2014 00:32:42 +0100 |
From: Tom Musta <address@hidden>
This patch refactors the lxsdx generator. Resuable code is isolated
into a macro. The macro will be used in subsequent patches in this
series to implement other scalar load instructions.
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 31 +++++++++++++++++--------------
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 2ae5d20..bed679c 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7022,20 +7022,23 @@ static inline TCGv_i64 cpu_vsrl(int n)
}
}
-static void gen_lxsdx(DisasContext *ctx)
-{
- TCGv EA;
- if (unlikely(!ctx->vsx_enabled)) {
- gen_exception(ctx, POWERPC_EXCP_VSXU);
- return;
- }
- gen_set_access_type(ctx, ACCESS_INT);
- EA = tcg_temp_new();
- gen_addr_reg_index(ctx, EA);
- gen_qemu_ld64(ctx, cpu_vsrh(xT(ctx->opcode)), EA);
- /* NOTE: cpu_vsrl is undefined */
- tcg_temp_free(EA);
-}
+#define VSX_LOAD_SCALAR(name, operation) \
+static void gen_##name(DisasContext *ctx) \
+{ \
+ TCGv EA; \
+ if (unlikely(!ctx->vsx_enabled)) { \
+ gen_exception(ctx, POWERPC_EXCP_VSXU); \
+ return; \
+ } \
+ gen_set_access_type(ctx, ACCESS_INT); \
+ EA = tcg_temp_new(); \
+ gen_addr_reg_index(ctx, EA); \
+ gen_qemu_##operation(ctx, cpu_vsrh(xT(ctx->opcode)), EA); \
+ /* NOTE: cpu_vsrl is undefined */ \
+ tcg_temp_free(EA); \
+}
+
+VSX_LOAD_SCALAR(lxsdx, ld64)
static void gen_lxvd2x(DisasContext *ctx)
{
--
1.8.1.4
- [Qemu-ppc] [PULL 103/130] target-ppc: Altivec 2.07: Vector Population Count Instructions, (continued)
- [Qemu-ppc] [PULL 103/130] target-ppc: Altivec 2.07: Vector Population Count Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 098/130] target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 107/130] target-ppc: Altivec 2.07: Vector Merge Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 110/130] target-ppc: Altivec 2.07: Quadword Addition and Subtracation, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 126/130] target-ppc: Change the hpte store API, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 127/130] target-ppc: Update ppc_hash64_store_hpte to support updating in-kernel htab, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 128/130] target-ppc: Introduce hypervisor call H_GET_TCE, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 122/130] target-ppc: Fix Compiler Warnings Due to 64-Bit Constants Declared as UL, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 040/130] target-ppc: VSX Stage 4: Add xsmulsp, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 028/130] target-ppc: Add VSX xscmp*dp Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 035/130] target-ppc: VSX Stage 4: Refactor lxsdx,
Alexander Graf <=
- [Qemu-ppc] [PULL 025/130] target-ppc: Add VSX ISA2.06 xtdiv Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 044/130] target-ppc: VSX Stage 4: add xsrsqrtesp, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 050/130] target-ppc: Scalar Round to Single Precision, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 058/130] target-ppc: Add Flag for ISA2.06 Atomic Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 045/130] target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 030/130] target-ppc: Add VSX Vector Compare Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 026/130] target-ppc: Add VSX ISA2.06 xtsqrt Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 018/130] target-ppc: General Support for VSX Helpers, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 112/130] target-ppc: Altivec 2.07: Doubleword Compares, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 042/130] target-ppc: VSX Stage 4: Add xsresp, Alexander Graf, 2014/03/06