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Re: [Qemu-ppc] [PATCH v2 1/6] PPC 85xx: Detect e500v2 / e500mc during ru


From: York Sun
Subject: Re: [Qemu-ppc] [PATCH v2 1/6] PPC 85xx: Detect e500v2 / e500mc during runtime
Date: Fri, 31 Jan 2014 10:05:34 -0800
User-agent: Mozilla/5.0 (X11; Linux i686; rv:24.0) Gecko/20100101 Thunderbird/24.2.0

On 01/31/2014 03:16 AM, Alexander Graf wrote:
> With the qemu-ppce500 machine type we can run the same board with
> either an e500v2 or an e500mc core plugged in.
> 
> This means that the IVOR setup can't be based on compile time decisions,
> so instead we have to do a runtime check which CPU generation we're
> running on.
> 
> Signed-off-by: Alexander Graf <address@hidden>
> ---
>  arch/powerpc/cpu/mpc85xx/fixed_ivor.S |   21 ++++++++++++++++-----
>  1 file changed, 16 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/powerpc/cpu/mpc85xx/fixed_ivor.S 
> b/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
> index ebbb8c0..635a97e 100644
> --- a/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
> +++ b/arch/powerpc/cpu/mpc85xx/fixed_ivor.S
> @@ -36,17 +36,25 @@
>       SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
>       SET_IVOR(15, 0x040) /* Debug */
>  
> -/* e500v1 & e500v2 only */
> -#ifndef CONFIG_E500MC
> +     /* Check for CPU */
> +     mfpvr   r3
> +     srwi    r3, r3, 16
> +     /* Compare with e500mc PVR major number */
> +     li      r4, 0
> +     ori     r4, r4, 0x8023
> +     cmpw    r3, r4
> +
> +     /* e500v1 & e500v2 only */
> +     bge     1f
>       SET_IVOR(32, 0x200) /* SPE Unavailable */
>       SET_IVOR(33, 0x220) /* Embedded FP Data */
>       SET_IVOR(34, 0x240) /* Embedded FP Round */
> -#endif
> +1:
>  
>       SET_IVOR(35, 0x260) /* Performance monitor */
>  
> -/* e500mc only */
> -#ifdef CONFIG_E500MC
> +     /* e500mc only */
> +     blt     2f

This "blt" has a risk. Please put a comment warning developers who will modify
the code to be sure the flag has not been updated since last "cmpw".

York




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