[Qemu-ppc] [PATCH 12/32] target-ppc: Don't share get_pteg_offset() between 32 and 64-bit

[David Gibson]

The get_pteg_offset() helper function is currently shared between 32-bit
and 64-bit hash mmus, taking a parameter for the hash pte size.  In the
64-bit paths, it's only called in one place, and it's a trivial
calculation.  This patch, therefore, open codes it for 64-bit and removes
the parameter for the 32-bit version, always using the 32-bit hash pte size.

Signed-off-by: David Gibson <address@hidden>
---
 target-ppc/cpu.h        |    1 -
 target-ppc/mmu-hash64.c |    2 +-
 target-ppc/mmu_helper.c |   10 +++++-----
 3 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 2df5754..0c1307b 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1145,7 +1145,6 @@ void ppc_hw_interrupt (CPUPPCState *env);
 
 #if !defined(CONFIG_USER_ONLY)
 void ppc_store_sdr1 (CPUPPCState *env, target_ulong value);
-hwaddr get_pteg_offset(CPUPPCState *env, hwaddr hash, int pte_size);
 #if defined(TARGET_PPC64)
 void ppc_store_asr (CPUPPCState *env, target_ulong value);
 int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index c14d81c..aba249b 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -377,7 +377,7 @@ static int find_pte64(CPUPPCState *env, mmu_ctx_t *ctx, int 
h,
     int ret, r;
 
     ret = -1; /* No entry found */
-    pteg_off = get_pteg_offset(env, ctx->hash[h], HASH_PTE_SIZE_64);
+    pteg_off = (ctx->hash[h] * HASH_PTE_SIZE_64 * 8) & env->htab_mask;
     for (i = 0; i < 8; i++) {
         if (env->external_htab) {
             pte0 = ldq_p(env->external_htab + pteg_off + (i * 16));
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index b0911ac..ba0412f 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -497,9 +497,9 @@ static inline int get_bat(CPUPPCState *env, mmu_ctx_t *ctx,
     return ret;
 }
 
-hwaddr get_pteg_offset(CPUPPCState *env, hwaddr hash, int pte_size)
+static hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash)
 {
-    return (hash * pte_size * 8) & env->htab_mask;
+    return (hash * HASH_PTE_SIZE_32 * 8) & env->htab_mask;
 }
 
 /* PTE table lookup */
@@ -512,7 +512,7 @@ static inline int find_pte32(CPUPPCState *env, mmu_ctx_t 
*ctx, int h,
     int ret, r;
 
     ret = -1; /* No entry found */
-    pteg_off = get_pteg_offset(env, ctx->hash[h], HASH_PTE_SIZE_32);
+    pteg_off = get_pteg_offset32(env, ctx->hash[h]);
     for (i = 0; i < 8; i++) {
         if (env->external_htab) {
             pte0 = ldl_p(env->external_htab + pteg_off + (i * 8));
@@ -1647,9 +1647,9 @@ int cpu_ppc_handle_mmu_fault(CPUPPCState *env, 
target_ulong address, int rw,
                 tlb_miss:
                     env->error_code |= ctx.key << 19;
                     env->spr[SPR_HASH1] = env->htab_base +
-                        get_pteg_offset(env, ctx.hash[0], HASH_PTE_SIZE_32);
+                        get_pteg_offset32(env, ctx.hash[0]);
                     env->spr[SPR_HASH2] = env->htab_base +
-                        get_pteg_offset(env, ctx.hash[1], HASH_PTE_SIZE_32);
+                        get_pteg_offset32(env, ctx.hash[1]);
                     break;
                 case POWERPC_MMU_SOFT_74xx:
                     if (rw == 1) {
-- 
1.7.10.4