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[Qemu-ppc] [PATCH 39/40] target-ppc: Don't use hwaddr to represent hardw
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 39/40] target-ppc: Don't use hwaddr to represent hardware state |
Date: |
Fri, 14 Dec 2012 13:13:55 +0100 |
From: David Gibson <address@hidden>
The hwaddr type is somewhat vaguely defined as being able to contain bus
addresses on the widest possible bus in the system. For that reason it's
discouraged for representing specific pieces of persistent hardware state,
which should instead use an explicit width type that matches the bits
available in real hardware. In particular, because of the possibility that
the size of hwaddr might change if different buses are added to the target
in future, it's not suitable for use in vm state descriptions for savevm
and migration.
This patch purges such unwise uses of hwaddr from the ppc target code,
which turns out to be just one. The ppcemb_tlb_t struct, used on a number
of embedded ppc models to represent a TLB entry contains a hwaddr for the
real address field. This patch changes it to be a fixed uint64_t which is
suitable enough for all machine types which use this structure.
Other uses of hwaddr in CPUPPCState turn out not to be problematic:
htab_base and htab_mask are just used for the convenience of the TCG code;
the underlying machine state is the SDR1 register, which is stored with
a suitable type already. Likewise the mpic_cpu_base field is only used
internally and does not represent fundamental hardware state which needs to
be saved.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/cpu.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5f1dc8b..742d4f8 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -355,7 +355,7 @@ struct ppc6xx_tlb_t {
typedef struct ppcemb_tlb_t ppcemb_tlb_t;
struct ppcemb_tlb_t {
- hwaddr RPN;
+ uint64_t RPN;
target_ulong EPN;
target_ulong PID;
target_ulong size;
--
1.6.0.2
- [Qemu-ppc] [PATCH 24/40] openpic: remove irq_out, (continued)
- [Qemu-ppc] [PATCH 24/40] openpic: remove irq_out, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 02/40] pseries: Use #define for XICS base irq number, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 16/40] openpic: Convert subregions to memory api, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 07/40] pseries: Implement PAPR NVRAM, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 31/40] openpic: fix minor coding style issues, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 15/40] openpic: combine mpic and openpic src handlers, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 06/40] pseries: Split xics irq configuration from state information, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 37/40] PPC: E500plat: Make a lot of PCI slots available, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 12/40] openpic: Remove unused code, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 29/40] PPC: e500: Declare pci bridge as bridge, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 39/40] target-ppc: Don't use hwaddr to represent hardware state,
Alexander Graf <=
- [Qemu-ppc] [PATCH 03/40] pseries: Return the token when we register an RTAS call, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 32/40] openpic: Accelerate pending irq search, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 17/40] openpic: combine mpic and openpic irq raise functions, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 01/40] pseries: Fix incorrect initialization of interrupt controller, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 33/40] PPC: E500: PCI: Make first slot qdev settable, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 05/40] pseries: Add tracepoints to the XICS interrupt controller, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 25/40] openpic: convert to qdev, Alexander Graf, 2012/12/14