[Qemu-ppc] Cache sizes and device tree

[David Gibson]

Hi Alex,

At present, pseries doesn't set the i-cache-size and d-cache-size
properties on the device tree CPU nodes.  That's a bit of a pain,
because it means the guest kernel then doesn't provide some files in
/sys and that means that lscpu bombs out with an error.

So the question is what should we put in there.  For KVM it's
straightforward enough for us to find the host L1 cache sizes and put
those in the guest device tree.  However to make it work for full emu
as well, we'll need to add this cache size information to the qemu cpu
table somewhere.

In practice, I think we need a way to add it incrementally - since I
really don't want to have to look up and confirm the L1 cache size for
every one of the hundreds of supported CPU models in order to make an
initial patch.

I'm thinking it should probably go into ppc_def_t.  That will need a
new DEF macro which includes the cache sizes, and then there will be a
somewhat ugly but manageable transition to the new macro as we add
cache sizes to various CPUs.  But then I'm not entirely sure how to
get to the information when we're building the devtree, since there
isn't actually an obvious link from the CPUPPCState to the ppc_def_t
it was created from.

Any thoughts on how to handle this?


-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson