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[Qemu-ppc] [PATCH 19/34] pseries: Remove XICS irq type enum type
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 19/34] pseries: Remove XICS irq type enum type |
Date: |
Thu, 4 Oct 2012 15:56:41 +0200 |
From: David Gibson <address@hidden>
Currently the XICS interrupt controller emulation uses a custom enum to
specify whether a given interrupt is level-sensitive or message-triggered.
This enum makes life awkward for saving the state, and isn't particularly
useful since there are only two possibilities. This patch replaces the
enum with a simple bool.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
hw/spapr.c | 8 ++++----
hw/spapr.h | 8 ++++----
hw/spapr_pci.c | 2 +-
hw/xics.c | 16 +++++++---------
hw/xics.h | 8 +-------
5 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/hw/spapr.c b/hw/spapr.c
index 0a0e9cd..1177efa 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -89,7 +89,7 @@
sPAPREnvironment *spapr;
-int spapr_allocate_irq(int hint, enum xics_irq_type type)
+int spapr_allocate_irq(int hint, bool lsi)
{
int irq;
@@ -105,13 +105,13 @@ int spapr_allocate_irq(int hint, enum xics_irq_type type)
return 0;
}
- xics_set_irq_type(spapr->icp, irq, type);
+ xics_set_irq_type(spapr->icp, irq, lsi);
return irq;
}
/* Allocate block of consequtive IRQs, returns a number of the first */
-int spapr_allocate_irq_block(int num, enum xics_irq_type type)
+int spapr_allocate_irq_block(int num, bool lsi)
{
int first = -1;
int i;
@@ -119,7 +119,7 @@ int spapr_allocate_irq_block(int num, enum xics_irq_type
type)
for (i = 0; i < num; ++i) {
int irq;
- irq = spapr_allocate_irq(0, type);
+ irq = spapr_allocate_irq(0, lsi);
if (!irq) {
return -1;
}
diff --git a/hw/spapr.h b/hw/spapr.h
index f9a7b0f..51a966b 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -291,17 +291,17 @@ void spapr_register_hypercall(target_ulong opcode,
spapr_hcall_fn fn);
target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
target_ulong *args);
-int spapr_allocate_irq(int hint, enum xics_irq_type type);
-int spapr_allocate_irq_block(int num, enum xics_irq_type type);
+int spapr_allocate_irq(int hint, bool lsi);
+int spapr_allocate_irq_block(int num, bool lsi);
static inline int spapr_allocate_msi(int hint)
{
- return spapr_allocate_irq(hint, XICS_MSI);
+ return spapr_allocate_irq(hint, false);
}
static inline int spapr_allocate_lsi(int hint)
{
- return spapr_allocate_irq(hint, XICS_LSI);
+ return spapr_allocate_irq(hint, true);
}
static inline uint32_t rtas_ld(target_ulong phys, int n)
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index 203155e..b628f89 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -351,7 +351,7 @@ static void rtas_ibm_change_msi(sPAPREnvironment *spapr,
/* There is no cached config, allocate MSIs */
if (!phb->msi_table[ndev].nvec) {
- irq = spapr_allocate_irq_block(req_num, XICS_MSI);
+ irq = spapr_allocate_irq_block(req_num, true);
if (irq < 0) {
fprintf(stderr, "Cannot allocate MSIs for device#%d", ndev);
rtas_st(rets, 0, -1); /* Hardware error */
diff --git a/hw/xics.c b/hw/xics.c
index 648af25..75c8cca 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -170,7 +170,7 @@ struct ics_irq_state {
#define XICS_STATUS_REJECTED 0x4
#define XICS_STATUS_MASKED_PENDING 0x8
uint8_t status;
- enum xics_irq_type type;
+ bool lsi;
};
struct ics_state {
@@ -244,7 +244,7 @@ static void ics_set_irq(void *opaque, int srcno, int val)
struct ics_state *ics = (struct ics_state *)opaque;
struct ics_irq_state *irq = ics->irqs + srcno;
- if (irq->type == XICS_LSI) {
+ if (irq->lsi) {
set_irq_lsi(ics, srcno, val);
} else {
set_irq_msi(ics, srcno, val);
@@ -278,7 +278,7 @@ static void ics_write_xive(struct ics_state *ics, int nr,
int server,
irq->server = server;
irq->priority = priority;
- if (irq->type == XICS_LSI) {
+ if (irq->lsi) {
write_xive_lsi(ics, srcno);
} else {
write_xive_msi(ics, srcno);
@@ -301,7 +301,7 @@ static void ics_resend(struct ics_state *ics)
struct ics_irq_state *irq = ics->irqs + i;
/* FIXME: filter by server#? */
- if (irq->type == XICS_LSI) {
+ if (irq->lsi) {
resend_lsi(ics, i);
} else {
resend_msi(ics, i);
@@ -314,7 +314,7 @@ static void ics_eoi(struct ics_state *ics, int nr)
int srcno = nr - ics->offset;
struct ics_irq_state *irq = ics->irqs + srcno;
- if (irq->type == XICS_LSI) {
+ if (irq->lsi) {
irq->status &= ~XICS_STATUS_SENT;
}
}
@@ -333,14 +333,12 @@ qemu_irq xics_get_qirq(struct icp_state *icp, int irq)
return icp->ics->qirqs[irq - icp->ics->offset];
}
-void xics_set_irq_type(struct icp_state *icp, int irq,
- enum xics_irq_type type)
+void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi)
{
assert((irq >= icp->ics->offset)
&& (irq < (icp->ics->offset + icp->ics->nr_irqs)));
- assert((type == XICS_MSI) || (type == XICS_LSI));
- icp->ics->irqs[irq - icp->ics->offset].type = type;
+ icp->ics->irqs[irq - icp->ics->offset].lsi = lsi;
}
static target_ulong h_cppr(CPUPPCState *env, sPAPREnvironment *spapr,
diff --git a/hw/xics.h b/hw/xics.h
index 99b96ac..6817268 100644
--- a/hw/xics.h
+++ b/hw/xics.h
@@ -31,14 +31,8 @@
struct icp_state;
-enum xics_irq_type {
- XICS_MSI, /* Message-signalled (edge) interrupt */
- XICS_LSI, /* Level-signalled interrupt */
-};
-
qemu_irq xics_get_qirq(struct icp_state *icp, int irq);
-void xics_set_irq_type(struct icp_state *icp, int irq,
- enum xics_irq_type type);
+void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi);
struct icp_state *xics_system_init(int nr_irqs);
--
1.6.0.2
- [Qemu-ppc] [PATCH 28/34] target-ppc: Extend FPU state for newer POWER CPUs, (continued)
- [Qemu-ppc] [PATCH 28/34] target-ppc: Extend FPU state for newer POWER CPUs, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 32/34] PPC: e500: calculate initrd_base like dt_base, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 30/34] device tree: simplify dumpdtb code, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 34/34] ppc/pseries: Reset VPA registration on CPU reset, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 25/34] pseries: Remove unnecessary locking from PAPR hash table hcalls, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 04/34] MAINTAINERS: Document Bamboo machine and ppc4xx devices, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 24/34] ppc405_uc: Fix buffer overflow, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 16/34] pseries: Fix XICS reset, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 11/34] pseries: Fix and cleanup CPU initialization and reset, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 31/34] PPC: e500: increase DTC_LOAD_PAD, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 19/34] pseries: Remove XICS irq type enum type,
Alexander Graf <=
- [Qemu-ppc] [PATCH 15/34] pseries: Reset emulated PCI TCE tables on system reset, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 09/34] target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macros, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 22/34] pseries: Fix semantics of RTAS int-on, int-off and set-xive functions, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 23/34] target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab(), Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 13/34] pseries: Add support for new KVM hash table control call, Alexander Graf, 2012/10/04
- [Qemu-ppc] [PATCH 12/34] pseries: Use new method to correct reset sequence, Alexander Graf, 2012/10/04
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/34] ppc patch queue 2012-10-04, Aurelien Jarno, 2012/10/06