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Re: [Qemu-ppc] [Qemu-devel] [PATCH] target-ppc: Init dcache and icache s


From: Alexander Graf
Subject: Re: [Qemu-ppc] [Qemu-devel] [PATCH] target-ppc: Init dcache and icache size for e500 user mode
Date: Wed, 18 Apr 2012 23:24:23 +0200

On 18.04.2012, at 18:27, Scott Wood wrote:

> On 04/18/2012 10:40 AM, Alexander Graf wrote:
>> On 04/15/2012 06:14 PM, Andreas Färber wrote:
>>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
>>> index 86a915c..ba4b84d 100644
>>> --- a/target-ppc/translate_init.c
>>> +++ b/target-ppc/translate_init.c
>>> @@ -4462,36 +4462,32 @@ static void init_proc_e500 (CPUPPCState *env,
>>> int version)
>>>                   &spr_read_spefscr,&spr_write_spefscr,
>>>                   0x00000000);
>>>      /* Memory management */
>>> -#if !defined(CONFIG_USER_ONLY)
>>> +#if defined(CONFIG_USER_ONLY)
>>> +    env->dcache_line_size = 32;
>>> +    env->icache_line_size = 32;
>>> +#else /* !defined(CONFIG_USER_ONLY) */
>> 
>> I don't think I like this one. If you're running linux-user with a
>> specific CPU (not the generic "I am the common ground" CPU)
> 
> But how much value is there really in doing that, that justifies a bunch
> of ifdefs in the per-CPU code?

As much value as in allowing specific CPUs to be selected in the first place. 
If you want the behavior of a specific CPU, we should give you the behavior of 
that specific CPU. That includes the dcbz zeroing length imho.


Alex




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