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[PULL 28/37] allwinner-i2c, adm1272: Use device_cold_reset() for softwar
From: |
Peter Maydell |
Subject: |
[PULL 28/37] allwinner-i2c, adm1272: Use device_cold_reset() for software-triggered reset |
Date: |
Thu, 25 Apr 2024 11:39:49 +0100 |
Rather than directly calling the device's implementation of its 'hold'
reset phase, call device_cold_reset(). This means we don't have to
adjust this callsite when we add another argument to the function
signature for the hold and exit reset methods.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luc Michel <luc.michel@amd.com>
Message-id: 20240412160809.1260625-3-peter.maydell@linaro.org
---
hw/i2c/allwinner-i2c.c | 3 +--
hw/sensor/adm1272.c | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i2c/allwinner-i2c.c b/hw/i2c/allwinner-i2c.c
index 8abcc39a5c2..96c20c86372 100644
--- a/hw/i2c/allwinner-i2c.c
+++ b/hw/i2c/allwinner-i2c.c
@@ -385,8 +385,7 @@ static void allwinner_i2c_write(void *opaque, hwaddr offset,
break;
case TWI_SRST_REG:
if (((value & TWI_SRST_MASK) == 0) && (s->srst & TWI_SRST_MASK)) {
- /* Perform reset */
- allwinner_i2c_reset_hold(OBJECT(s));
+ device_cold_reset(DEVICE(s));
}
s->srst = value & TWI_SRST_MASK;
break;
diff --git a/hw/sensor/adm1272.c b/hw/sensor/adm1272.c
index 1f7c8abb838..a19557ec9ea 100644
--- a/hw/sensor/adm1272.c
+++ b/hw/sensor/adm1272.c
@@ -386,7 +386,7 @@ static int adm1272_write_data(PMBusDevice *pmdev, const
uint8_t *buf,
break;
case ADM1272_MFR_POWER_CYCLE:
- adm1272_exit_reset((Object *)s);
+ device_cold_reset(DEVICE(s));
break;
case ADM1272_HYSTERESIS_LOW:
--
2.34.1
- [PULL 09/37] target/arm: Handle PSTATE.ALLINT on taking an exception, (continued)
- [PULL 09/37] target/arm: Handle PSTATE.ALLINT on taking an exception, Peter Maydell, 2024/04/25
- [PULL 11/37] hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU, Peter Maydell, 2024/04/25
- [PULL 16/37] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0, Peter Maydell, 2024/04/25
- [PULL 17/37] hw/intc/arm_gicv3: Implement GICD_INMIR, Peter Maydell, 2024/04/25
- [PULL 20/37] hw/intc/arm_gicv3: Implement NMI interrupt priority, Peter Maydell, 2024/04/25
- [PULL 22/37] hw/intc/arm_gicv3: Report the VINMI interrupt, Peter Maydell, 2024/04/25
- [PULL 23/37] target/arm: Add FEAT_NMI to max, Peter Maydell, 2024/04/25
- [PULL 25/37] hw/dma: avoid apparent overflow in soc_dma_set_request, Peter Maydell, 2024/04/25
- [PULL 24/37] hw/arm/virt: Enable NMI support in the GIC if the CPU has FEAT_NMI, Peter Maydell, 2024/04/25
- [PULL 27/37] hw/misc: Don't special case RESET_TYPE_COLD in npcm7xx_clk, gcr, Peter Maydell, 2024/04/25
- [PULL 28/37] allwinner-i2c, adm1272: Use device_cold_reset() for software-triggered reset,
Peter Maydell <=
- [PULL 32/37] reset: Add RESET_TYPE_SNAPSHOT_LOAD, Peter Maydell, 2024/04/25
- [PULL 34/37] hw/char/stm32l4x5_usart: Enable serial read and write, Peter Maydell, 2024/04/25
- [PULL 35/37] hw/char/stm32l4x5_usart: Add options for serial parameters setting, Peter Maydell, 2024/04/25
- [PULL 31/37] docs/devel/reset: Update to new API for hold and exit phase methods, Peter Maydell, 2024/04/25
- [PULL 36/37] hw/arm: Add the USART to the stm32l4x5 SoC, Peter Maydell, 2024/04/25
- [PULL 30/37] hw, target: Add ResetType argument to hold and exit phase methods, Peter Maydell, 2024/04/25
- [PULL 37/37] tests/qtest: Add tests for the STM32L4x5 USART, Peter Maydell, 2024/04/25
- Re: [PULL 00/37] target-arm queue, Richard Henderson, 2024/04/25