[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 23/35] target/i386: Preserve DisasContextBase.insn_start across re
From: |
Richard Henderson |
Subject: |
[PULL 23/35] target/i386: Preserve DisasContextBase.insn_start across rewind |
Date: |
Mon, 8 Apr 2024 07:49:17 -1000 |
When aborting translation of the current insn, restore the
previous value of insn_start.
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/i386/tcg/translate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 07f642dc9e..76a42c679c 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -139,6 +139,7 @@ typedef struct DisasContext {
TCGv_i64 tmp1_i64;
sigjmp_buf jmpbuf;
+ TCGOp *prev_insn_start;
TCGOp *prev_insn_end;
} DisasContext;
@@ -3123,6 +3124,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
/* END TODO */
s->base.num_insns--;
tcg_remove_ops_after(s->prev_insn_end);
+ s->base.insn_start = s->prev_insn_start;
s->base.is_jmp = DISAS_TOO_MANY;
return false;
default:
@@ -6995,6 +6997,7 @@ static void i386_tr_insn_start(DisasContextBase *dcbase,
CPUState *cpu)
DisasContext *dc = container_of(dcbase, DisasContext, base);
target_ulong pc_arg = dc->base.pc_next;
+ dc->prev_insn_start = dc->base.insn_start;
dc->prev_insn_end = tcg_last_op();
if (tb_cflags(dcbase->tb) & CF_PCREL) {
pc_arg &= ~TARGET_PAGE_MASK;
--
2.34.1
- [PULL 12/35] target/sh4: Fix mac.l with saturation enabled, (continued)
- [PULL 12/35] target/sh4: Fix mac.l with saturation enabled, Richard Henderson, 2024/04/08
- [PULL 14/35] target/sh4: add missing CHECK_NOT_DELAY_SLOT, Richard Henderson, 2024/04/08
- [PULL 13/35] target/sh4: Fix mac.w with saturation enabled, Richard Henderson, 2024/04/08
- [PULL 16/35] target/m68k: Pass semihosting arg to exit, Richard Henderson, 2024/04/08
- [PULL 15/35] target/m68k: Map FPU exceptions to FPSR register, Richard Henderson, 2024/04/08
- [PULL 17/35] target/m68k: Perform the semihosting test during translate, Richard Henderson, 2024/04/08
- [PULL 18/35] target/m68k: Support semihosting on non-ColdFire targets, Richard Henderson, 2024/04/08
- [PULL 19/35] tcg: Add TCGContext.emit_before_op, Richard Henderson, 2024/04/08
- [PULL 20/35] accel/tcg: Add insn_start to DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 21/35] target/arm: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 23/35] target/i386: Preserve DisasContextBase.insn_start across rewind,
Richard Henderson <=
- [PULL 24/35] target/microblaze: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 25/35] target/riscv: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 26/35] target/s390x: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 27/35] accel/tcg: Improve can_do_io management, Richard Henderson, 2024/04/08
- [PULL 29/35] util/bufferiszero: Remove AVX512 variant, Richard Henderson, 2024/04/08
- [PULL 28/35] util/bufferiszero: Remove SSE4.1 variant, Richard Henderson, 2024/04/08
- [PULL 30/35] util/bufferiszero: Reorganize for early test for acceleration, Richard Henderson, 2024/04/08
- [PULL 22/35] target/hppa: Use insn_start from DisasContextBase, Richard Henderson, 2024/04/08
- [PULL 33/35] util/bufferiszero: Improve scalar variant, Richard Henderson, 2024/04/08
- [PULL 31/35] util/bufferiszero: Remove useless prefetches, Richard Henderson, 2024/04/08