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Re: [Qemu-devel] [PATCH 1/6] target/rx: Disassemble rx_index_addr into a
From: |
Yoshinori Sato |
Subject: |
Re: [Qemu-devel] [PATCH 1/6] target/rx: Disassemble rx_index_addr into a string |
Date: |
Tue, 28 May 2019 00:28:12 +0900 |
User-agent: |
Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (Gojō) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) |
On Fri, 24 May 2019 00:07:58 +0900,
Richard Henderson wrote:
>
> We were eliding all zero indexes. It is only ld==0 that does
> not have an index in the instruction. This also allows us to
> avoid breaking the final print into multiple pieces.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Yoshinori Sato <address@hidden>
> ---
> target/rx/disas.c | 154 +++++++++++++++++-----------------------------
> 1 file changed, 55 insertions(+), 99 deletions(-)
>
> diff --git a/target/rx/disas.c b/target/rx/disas.c
> index 8cada4825d..64342537ee 100644
> --- a/target/rx/disas.c
> +++ b/target/rx/disas.c
> @@ -107,49 +107,42 @@ static const char psw[] = {
> 'i', 'u', 0, 0, 0, 0, 0, 0,
> };
>
> -static uint32_t rx_index_addr(int ld, int size, DisasContext *ctx)
> +static void rx_index_addr(DisasContext *ctx, char out[8], int ld, int mi)
> {
> - bfd_byte buf[2];
> + uint32_t addr = ctx->addr;
> + uint8_t buf[2];
> + uint16_t dsp;
> +
> switch (ld) {
> case 0:
> - return 0;
> + /* No index; return empty string. */
> + out[0] = '\0';
> + return;
> case 1:
> - ctx->dis->read_memory_func(ctx->addr, buf, 1, ctx->dis);
> ctx->addr += 1;
> - return ((uint8_t)buf[0]) << size;
> + ctx->dis->read_memory_func(addr, buf, 1, ctx->dis);
> + dsp = buf[0];
> + break;
> case 2:
> - ctx->dis->read_memory_func(ctx->addr, buf, 2, ctx->dis);
> ctx->addr += 2;
> - return lduw_le_p(buf) << size;
> + ctx->dis->read_memory_func(addr, buf, 2, ctx->dis);
> + dsp = lduw_le_p(buf);
> + break;
> + default:
> + g_assert_not_reached();
> }
> - g_assert_not_reached();
> +
> + sprintf(out, "%u", dsp << (mi < 3 ? mi : 4 - mi));
> }
>
> static void operand(DisasContext *ctx, int ld, int mi, int rs, int rd)
> {
> - int dsp;
> static const char sizes[][4] = {".b", ".w", ".l", ".uw", ".ub"};
> + char dsp[8];
> +
> if (ld < 3) {
> - switch (mi) {
> - case 4:
> - /* dsp[rs].ub */
> - dsp = rx_index_addr(ld, RX_MEMORY_BYTE, ctx);
> - break;
> - case 3:
> - /* dsp[rs].uw */
> - dsp = rx_index_addr(ld, RX_MEMORY_WORD, ctx);
> - break;
> - default:
> - /* dsp[rs].b */
> - /* dsp[rs].w */
> - /* dsp[rs].l */
> - dsp = rx_index_addr(ld, mi, ctx);
> - break;
> - }
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d]%s", rs, sizes[mi]);
> + rx_index_addr(ctx, dsp, ld, mi);
> + prt("%s[r%d]%s", dsp, rs, sizes[mi]);
> } else {
> prt("r%d", rs);
> }
> @@ -235,7 +228,7 @@ static bool trans_MOV_ra(DisasContext *ctx, arg_MOV_ra *a)
> /* mov.[bwl] rs,rd */
> static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a)
> {
> - int dsp;
> + char dspd[8], dsps[8];
>
> prt("mov.%c\t", size[a->sz]);
> if (a->lds == 3 && a->ldd == 3) {
> @@ -244,29 +237,15 @@ static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm
> *a)
> return true;
> }
> if (a->lds == 3) {
> - prt("r%d, ", a->rd);
> - dsp = rx_index_addr(a->ldd, a->sz, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d]", a->rs);
> + rx_index_addr(ctx, dspd, a->ldd, a->sz);
> + prt("r%d, %s[r%d]", a->rs, dspd, a->rd);
> } else if (a->ldd == 3) {
> - dsp = rx_index_addr(a->lds, a->sz, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d], r%d", a->rs, a->rd);
> + rx_index_addr(ctx, dsps, a->lds, a->sz);
> + prt("%s[r%d], r%d", dsps, a->rs, a->rd);
> } else {
> - dsp = rx_index_addr(a->lds, a->sz, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d], ", a->rs);
> - dsp = rx_index_addr(a->ldd, a->sz, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d]", a->rd);
> + rx_index_addr(ctx, dsps, a->lds, a->sz);
> + rx_index_addr(ctx, dspd, a->ldd, a->sz);
> + prt("%s[r%d], %s[r%d]", dsps, a->rs, dspd, a->rd);
> }
> return true;
> }
> @@ -357,12 +336,10 @@ static bool trans_PUSH_r(DisasContext *ctx, arg_PUSH_r
> *a)
> /* push dsp[rs] */
> static bool trans_PUSH_m(DisasContext *ctx, arg_PUSH_m *a)
> {
> - prt("push\t");
> - int dsp = rx_index_addr(a->ld, a->sz, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d]", a->rs);
> + char dsp[8];
> +
> + rx_index_addr(ctx, dsp, a->ld, a->sz);
> + prt("push\t%s[r%d]", dsp, a->rs);
> return true;
> }
>
> @@ -389,17 +366,13 @@ static bool trans_XCHG_rr(DisasContext *ctx,
> arg_XCHG_rr *a)
> /* xchg dsp[rs].<mi>,rd */
> static bool trans_XCHG_mr(DisasContext *ctx, arg_XCHG_mr *a)
> {
> - int dsp;
> static const char msize[][4] = {
> "b", "w", "l", "ub", "uw",
> };
> + char dsp[8];
>
> - prt("xchg\t");
> - dsp = rx_index_addr(a->ld, a->mi, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d].%s, r%d", a->rs, msize[a->mi], a->rd);
> + rx_index_addr(ctx, dsp, a->ld, a->mi);
> + prt("xchg\t%s[r%d].%s, r%d", dsp, a->rs, msize[a->mi], a->rd);
> return true;
> }
>
> @@ -552,13 +525,10 @@ static bool trans_ADC_rr(DisasContext *ctx, arg_ADC_rr
> *a)
> /* adc dsp[rs], rd */
> static bool trans_ADC_mr(DisasContext *ctx, arg_ADC_mr *a)
> {
> - int dsp;
> - prt("adc\t");
> - dsp = rx_index_addr(a->ld, 2, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d], r%d", a->rs, a->rd);
> + char dsp[8];
> +
> + rx_index_addr(ctx, dsp, a->ld, 2);
> + prt("adc\t%s[r%d], r%d", dsp, a->rs, a->rd);
> return true;
> }
>
> @@ -1217,25 +1187,17 @@ static bool trans_ITOF(DisasContext *ctx, arg_ITOF *a)
>
> #define BOP_IM(name, reg) \
> do { \
> - int dsp; \
> - prt("b%s\t#%d, ", #name, a->imm); \
> - dsp = rx_index_addr(a->ld, RX_MEMORY_BYTE, ctx); \
> - if (dsp > 0) { \
> - prt("%d", dsp); \
> - } \
> - prt("[r%d]", reg); \
> + char dsp[8]; \
> + rx_index_addr(ctx, dsp, a->ld, RX_MEMORY_BYTE); \
> + prt("b%s\t#%d, %s[r%d]", #name, a->imm, dsp, reg); \
> return true; \
> } while (0)
>
> #define BOP_RM(name) \
> do { \
> - int dsp; \
> - prt("b%s\tr%d, ", #name, a->rd); \
> - dsp = rx_index_addr(a->ld, RX_MEMORY_BYTE, ctx); \
> - if (dsp > 0) { \
> - prt("%d", dsp); \
> - } \
> - prt("[r%d]", a->rs); \
> + char dsp[8]; \
> + rx_index_addr(ctx, dsp, a->ld, RX_MEMORY_BYTE); \
> + prt("b%s\tr%d, %s[r%d]", #name, a->rd, dsp, a->rs); \
> return true; \
> } while (0)
>
> @@ -1346,12 +1308,10 @@ static bool trans_BNOT_ir(DisasContext *ctx,
> arg_BNOT_ir *a)
> /* bmcond #imm, dsp[rd] */
> static bool trans_BMCnd_im(DisasContext *ctx, arg_BMCnd_im *a)
> {
> - int dsp = rx_index_addr(a->ld, RX_MEMORY_BYTE, ctx);
> - prt("bm%s\t#%d, ", cond[a->cd], a->imm);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[%d]", a->rd);
> + char dsp[8];
> +
> + rx_index_addr(ctx, dsp, a->ld, RX_MEMORY_BYTE);
> + prt("bm%s\t#%d, %s[r%d]", cond[a->cd], a->imm, dsp, a->rd);
> return true;
> }
>
> @@ -1443,16 +1403,12 @@ static bool trans_WAIT(DisasContext *ctx, arg_WAIT *a)
> /* sccnd.[bwl] dsp:[rd] */
> static bool trans_SCCnd(DisasContext *ctx, arg_SCCnd *a)
> {
> - int dsp;
> - prt("sc%s.%c\t", cond[a->cd], size[a->sz]);
> if (a->ld < 3) {
> - dsp = rx_index_addr(a->sz, a->ld, ctx);
> - if (dsp > 0) {
> - prt("%d", dsp);
> - }
> - prt("[r%d]", a->rd);
> + char dsp[8];
> + rx_index_addr(ctx, dsp, a->sz, a->ld);
> + prt("sc%s.%c\t%s[r%d]", cond[a->cd], size[a->sz], dsp, a->rd);
> } else {
> - prt("r%d", a->rd);
> + prt("sc%s.%c\tr%d", cond[a->cd], size[a->sz], a->rd);
> }
> return true;
> }
> --
> 2.17.1
>
- [Qemu-devel] [PATCH 0/6] target/rx: Improvements to disassembly, Richard Henderson, 2019/05/23
- [Qemu-devel] [PATCH 1/6] target/rx: Disassemble rx_index_addr into a string, Richard Henderson, 2019/05/23
- Re: [Qemu-devel] [PATCH 1/6] target/rx: Disassemble rx_index_addr into a string,
Yoshinori Sato <=
- [Qemu-devel] [PATCH 2/6] target/rx: Replace operand with prt_ldmi in disassembler, Richard Henderson, 2019/05/23
- [Qemu-devel] [PATCH 5/6] target/rx: Collect all bytes during disassembly, Richard Henderson, 2019/05/23
- [Qemu-devel] [PATCH 3/6] target/rx: Use prt_ldmi for XCHG_mr disassembly, Richard Henderson, 2019/05/23
- [Qemu-devel] [PATCH 6/6] target/rx: Dump bytes for each insn during disassembly, Richard Henderson, 2019/05/23
- [Qemu-devel] [PATCH 4/6] target/rx: Emit all disassembly in one prt(), Richard Henderson, 2019/05/23