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[Qemu-devel] [PULL v2 07/11] target/mips: Refactor and fix INSERT.<B|H|W
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 07/11] target/mips: Refactor and fix INSERT.<B|H|W|D> instructions |
Date: |
Wed, 22 May 2019 20:58:38 +0200 |
From: Mateja Marjanovic <address@hidden>
The old version of the helper for the INSERT.<B|H|W|D> MSA instructions
has been replaced with four helpers that don't use switch, and change
the endianness of the given index, when executed on a big endian host.
Signed-off-by: Mateja Marjanovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
---
target/mips/helper.h | 5 +++-
target/mips/msa_helper.c | 65 ++++++++++++++++++++++++++++++++++++------------
target/mips/translate.c | 19 +++++++++++++-
3 files changed, 71 insertions(+), 18 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index c4a77e2..2863f60 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -877,7 +877,6 @@ DEF_HELPER_5(msa_hsub_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_sldi_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_splati_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_insert_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_insve_df, void, env, i32, i32, i32, i32)
DEF_HELPER_3(msa_ctcmsa, void, env, tl, i32)
DEF_HELPER_2(msa_cfcmsa, tl, env, i32)
@@ -944,6 +943,10 @@ DEF_HELPER_4(msa_copy_s_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_copy_u_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_copy_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_copy_u_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_insert_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_insert_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_insert_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_insert_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_fclass_df, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ftrunc_s_df, void, env, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 52680fe..ee1b1fa 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1340,28 +1340,61 @@ void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd,
env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
}
-void helper_msa_insert_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
+void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,
uint32_t rs_num, uint32_t n)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
target_ulong rs = env->active_tc.gpr[rs_num];
+ n %= 16;
+#if defined(HOST_WORDS_BIGENDIAN)
+ if (n < 8) {
+ n = 8 - n - 1;
+ } else {
+ n = 24 - n - 1;
+ }
+#endif
+ pwd->b[n] = (int8_t)rs;
+}
- switch (df) {
- case DF_BYTE:
- pwd->b[n] = (int8_t)rs;
- break;
- case DF_HALF:
- pwd->h[n] = (int16_t)rs;
- break;
- case DF_WORD:
- pwd->w[n] = (int32_t)rs;
- break;
- case DF_DOUBLE:
- pwd->d[n] = (int64_t)rs;
- break;
- default:
- assert(0);
+void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,
+ uint32_t rs_num, uint32_t n)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ target_ulong rs = env->active_tc.gpr[rs_num];
+ n %= 8;
+#if defined(HOST_WORDS_BIGENDIAN)
+ if (n < 4) {
+ n = 4 - n - 1;
+ } else {
+ n = 12 - n - 1;
+ }
+#endif
+ pwd->h[n] = (int16_t)rs;
+}
+
+void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,
+ uint32_t rs_num, uint32_t n)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ target_ulong rs = env->active_tc.gpr[rs_num];
+ n %= 4;
+#if defined(HOST_WORDS_BIGENDIAN)
+ if (n < 2) {
+ n = 2 - n - 1;
+ } else {
+ n = 6 - n - 1;
}
+#endif
+ pwd->w[n] = (int32_t)rs;
+}
+
+void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,
+ uint32_t rs_num, uint32_t n)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ target_ulong rs = env->active_tc.gpr[rs_num];
+ n %= 2;
+ pwd->d[n] = (int64_t)rs;
}
void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 68ea6ee..dd706ad 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28346,7 +28346,24 @@ static void gen_msa_elm_df(CPUMIPSState *env,
DisasContext *ctx, uint32_t df,
}
break;
case OPC_INSERT_df:
- gen_helper_msa_insert_df(cpu_env, tdf, twd, tws, tn);
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_insert_b(cpu_env, twd, tws, tn);
+ break;
+ case DF_HALF:
+ gen_helper_msa_insert_h(cpu_env, twd, tws, tn);
+ break;
+ case DF_WORD:
+ gen_helper_msa_insert_w(cpu_env, twd, tws, tn);
+ break;
+#if defined(TARGET_MIPS64)
+ case DF_DOUBLE:
+ gen_helper_msa_insert_d(cpu_env, twd, tws, tn);
+ break;
+#endif
+ default:
+ assert(0);
+ }
break;
}
break;
--
2.7.4
- [Qemu-devel] [PULL v2 00/11] MIPS queue for May 19th, 2019 - v2, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 01/11] target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardware, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 02/11] target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on hardware, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 05/11] target/mips: Refactor and fix COPY_S.<B|H|W|D> instructions, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 07/11] target/mips: Refactor and fix INSERT.<B|H|W|D> instructions,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v2 09/11] hw/mips: Use object_initialize_child for correct reference counting, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 04/11] target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 03/11] target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 10/11] mips: Decide to map PAGE_EXEC in map_address, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 06/11] target/mips: Refactor and fix COPY_U.<B|H|W> instructions, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 08/11] hw/mips: Use object_initialize() on MIPSCPSState, Aleksandar Markovic, 2019/05/22
- [Qemu-devel] [PULL v2 11/11] BootLinuxSshTest: Test some userspace commands on Malta, Aleksandar Markovic, 2019/05/22
- Re: [Qemu-devel] [PULL v2 00/11] MIPS queue for May 19th, 2019 - v2, Aleksandar Markovic, 2019/05/22