Re: [Qemu-devel] [QEMU-PPC] [PATCH 00/13] target/ppc: Implement KVM support under TCG

[Suraj Jitindar Singh]

On Mon, 2019-05-06 at 16:20 +1000, David Gibson wrote:
> On Fri, May 03, 2019 at 03:53:03PM +1000, Suraj Jitindar Singh wrote:
> > This patch series adds the necessary parts so that a tcg guest is
> > able to use
> > kvm facilities. That is a tcg guest can boot its own kvm guests.
> 
> The topic line is a bit hard to parse.  IIUC there are basically two
> things in this series:
> 
> 1) Implement / fix TCG emulation of TCG hypervisor facilities, so
> that
>    a TCG powernv machine can use them to run KVM guests.
> 
> 2) Have the pseries machine under TCG implement the paravirtualized
>    interfaces to allow nested virtualizationm therefore allowing TCG
>    pseries machines to run KVM guests
> 
> Is that right?

That is correct.

Patches 1-7 achieve 1) TCG emulation of hypervisor facilities

Patches 8-13 achieve 2) emulation of paravirtualised KVM for pseries
guest

> 
> > The main requirements for this were a few registers and
> > instructions as well as
> > some hcalls and the addition of partition scoped translation in the
> > radix mmu
> > emulation.
> > 
> > This can be used to boot a kvm guest under a pseries tcg guest:
> > Use power9_v2.2 cpu and add -machine cap-nested-hv=on for the first
> > guest.
> > Then inside that guest boot a kvm guest as normal.
> > This takes advantage of the new hcalls with qemu emulating them as
> > a normal
> > hypervisor would on a real machine.
> > 
> > This can also be used to boot a kvm guest under a powernv tcg
> > guest:
> > Use any power9 cpu type.
> > This takes advantage of the new hv register access added.
> > Note that for powernv there is no xive interrupt excalation for KVM
> > which means
> > that while the guest will boot, it won't receive any interrupts.
> > 
> > Suraj Jitindar Singh (13):
> >   target/ppc: Implement the VTB for HV access
> >   target/ppc: Work [S]PURR implementation and add HV support
> >   target/ppc: Add SPR ASDR
> >   target/ppc: Add SPR TBU40
> >   target/ppc: Add privileged message send facilities
> >   target/ppc: Enforce that the root page directory size must be at
> > least
> >     5
> >   target/ppc: Handle partition scoped radix tree translation
> >   target/ppc: Implement hcall H_SET_PARTITION_TABLE
> >   target/ppc: Implement hcall H_ENTER_NESTED
> >   target/ppc: Implement hcall H_TLB_INVALIDATE
> >   target/ppc: Implement hcall H_COPY_TOFROM_GUEST
> >   target/ppc: Introduce POWER9 DD2.2 cpu type
> >   target/ppc: Enable SPAPR_CAP_NESTED_KVM_HV under tcg
> > 
> >  hw/ppc/ppc.c                    |  46 ++++-
> >  hw/ppc/spapr_caps.c             |  22 ++-
> >  hw/ppc/spapr_cpu_core.c         |   1 +
> >  hw/ppc/spapr_hcall.c            | 409
> > +++++++++++++++++++++++++++++++++++++++
> >  include/hw/ppc/ppc.h            |   4 +-
> >  include/hw/ppc/spapr.h          |   7 +-
> >  linux-user/ppc/cpu_loop.c       |   5 +
> >  target/ppc/cpu-models.c         |   2 +
> >  target/ppc/cpu-models.h         |   1 +
> >  target/ppc/cpu.h                |  70 +++++++
> >  target/ppc/excp_helper.c        |  79 +++++++-
> >  target/ppc/helper.h             |   9 +
> >  target/ppc/misc_helper.c        |  46 +++++
> >  target/ppc/mmu-radix64.c        | 412
> > ++++++++++++++++++++++++++++------------
> >  target/ppc/mmu-radix64.h        |   4 +
> >  target/ppc/timebase_helper.c    |  20 ++
> >  target/ppc/translate.c          |  28 +++
> >  target/ppc/translate_init.inc.c | 107 +++++++++--
> >  18 files changed, 1115 insertions(+), 157 deletions(-)
> > 
> 
>