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[Qemu-devel] [PATCH v3 09/31] tcg: Promote tcg_out_{dup, dupi}_vec to ba
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v3 09/31] tcg: Promote tcg_out_{dup, dupi}_vec to backend interface |
Date: |
Fri, 3 May 2019 22:52:38 -0700 |
The i386 backend already has these functions, and the aarch64 backend
could easily split out one. Nothing is done with these functions yet,
but this will aid register allocation of INDEX_op_dup_vec in a later patch.
Adjust the aarch64 tcg_out_dupi_vec signature to match the new interface.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.inc.c | 12 ++++++++++--
tcg/i386/tcg-target.inc.c | 3 ++-
tcg/tcg.c | 14 ++++++++++++++
3 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index ee89734318..e443b5df23 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -799,7 +799,7 @@ static void tcg_out_logicali(TCGContext *s, AArch64Insn
insn, TCGType ext,
}
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
- TCGReg rd, uint64_t v64)
+ TCGReg rd, tcg_target_long v64)
{
int op, cmode, imm8;
@@ -814,6 +814,14 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
}
}
+static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
+ TCGReg rd, TCGReg rs)
+{
+ int is_q = type - TCG_TYPE_V64;
+ tcg_out_insn(s, 3605, DUP, is_q, rd, rs, 1 << vece, 0);
+ return true;
+}
+
static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
tcg_target_long value)
{
@@ -2201,7 +2209,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a1);
break;
case INDEX_op_dup_vec:
- tcg_out_insn(s, 3605, DUP, is_q, a0, a1, 1 << vece, 0);
+ tcg_out_dup_vec(s, type, vece, a0, a1);
break;
case INDEX_op_shli_vec:
tcg_out_insn(s, 3614, SHL, is_q, a0, a1, a2 + (8 << vece));
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 1198c76392..0d621670c7 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -855,7 +855,7 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg
ret, TCGReg arg)
return true;
}
-static void tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
+static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
TCGReg r, TCGReg a)
{
if (have_avx2) {
@@ -888,6 +888,7 @@ static void tcg_out_dup_vec(TCGContext *s, TCGType type,
unsigned vece,
g_assert_not_reached();
}
}
+ return true;
}
static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 68d86361e2..3ef4d3478d 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -109,10 +109,24 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
const int *const_args);
#if TCG_TARGET_MAYBE_vec
+static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
+ TCGReg dst, TCGReg src);
+static void tcg_out_dupi_vec(TCGContext *s, TCGType type,
+ TCGReg dst, tcg_target_long arg);
static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
unsigned vece, const TCGArg *args,
const int *const_args);
#else
+static inline bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece,
+ TCGReg dst, TCGReg src)
+{
+ g_assert_not_reached();
+}
+static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type,
+ TCGReg dst, tcg_target_long arg)
+{
+ g_assert_not_reached();
+}
static inline void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl,
unsigned vece, const TCGArg *args,
const int *const_args)
--
2.17.1
- [Qemu-devel] [PATCH v3 00/31] tcg vector improvements, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 01/31] tcg: Implement tcg_gen_gvec_3i(), Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 03/31] tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 02/31] tcg: Do not recreate INDEX_op_neg_vec unless supported, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 05/31] tcg: Assert fixed_reg is read-only, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 06/31] tcg/arm: Use tcg_out_mov_reg in tcg_out_mov, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 07/31] tcg: Return bool success from tcg_out_mov, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 08/31] tcg: Support cross-class moves without instruction support, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 09/31] tcg: Promote tcg_out_{dup, dupi}_vec to backend interface,
Richard Henderson <=
- [Qemu-devel] [PATCH v3 11/31] tcg: Add tcg_out_dupm_vec to the backend interface, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 12/31] tcg/i386: Implement tcg_out_dupm_vec, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 13/31] tcg/aarch64: Implement tcg_out_dupm_vec, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 10/31] tcg: Manually expand INDEX_op_dup_vec, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 04/31] tcg: Specify optional vector requirements with a list, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 16/31] tcg/i386: Support vector variable shift opcodes, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 17/31] tcg/aarch64: Support vector variable shift opcodes, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 14/31] tcg: Add INDEX_op_dupm_vec, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 15/31] tcg: Add gvec expanders for variable shift, Richard Henderson, 2019/05/04
- [Qemu-devel] [PATCH v3 19/31] tcg/i386: Support vector scalar shift opcodes, Richard Henderson, 2019/05/04