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Re: [Qemu-devel] [PATCH RFC v8 03/12] target/rx: CPU definition
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From: |
Alex Bennée |
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Subject: |
Re: [Qemu-devel] [PATCH RFC v8 03/12] target/rx: CPU definition |
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Date: |
Fri, 03 May 2019 16:45:44 +0100 |
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User-agent: |
mu4e 1.3.1; emacs 26.1 |
Yoshinori Sato <address@hidden> writes:
> Signed-off-by: Yoshinori Sato <address@hidden>
<snip>
> +{
> + *pc = env->pc;
> + *cs_base = 0;
> + *flags = FIELD_DP32(*flags, PSW, PM, env->psw_pm);
You can't reference flags here, the caller expect you to be setting it's
value. Otherwise the compiler will rightfully complain you've just
accessed unitialised data.
*flags = FIELD_DP32(0, PSW, PM, env->psw_pm);
--
Alex Bennée
- [Qemu-devel] [PATCH RFC v8 00/12] Add RX archtecture support, Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 11/12] MAINTAINERS: Add RX, Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 10/12] Add rx-softmmu, Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 05/12] target/rx: Miscellaneous files, Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 03/12] target/rx: CPU definition, Yoshinori Sato, 2019/05/02
- Re: [Qemu-devel] [PATCH RFC v8 03/12] target/rx: CPU definition,
Alex Bennée <=
- [Qemu-devel] [PATCH RFC v8 12/12] hw/registerfields.h: Add 8bit and 16bit register macros., Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 02/12] target/rx: TCG helper, Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 08/12] hw/char: RX62N serical communication interface (SCI), Yoshinori Sato, 2019/05/02
- [Qemu-devel] [PATCH RFC v8 07/12] hw/timer: RX62N internal timer modules, Yoshinori Sato, 2019/05/02