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Re: [Qemu-devel] [PATCH v6 1/2] Add generic Nios II board.
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v6 1/2] Add generic Nios II board. |
Date: |
Tue, 26 Mar 2019 14:07:56 +0000 |
On Thu, 21 Mar 2019 at 18:40, Sandra Loosemore <address@hidden> wrote:
>
> This patch adds support for a generic MMU-less Nios II board that can
> be used e.g. for bare-metal compiler testing with the linker script
> and startup code provided by libgloss. Nios II booting is also
> tweaked so that bare-metal binaries start executing in RAM starting at
> 0x00000000, rather than an alias at 0xc0000000, which allows features
> such as unwinding to work when binaries are linked to start at the
> beginning of the address space.
>
> The generic_nommu.c parts are based on code by Andrew Jenner, which was
> in turn based on code by Marek Vasut.
>
> Originally by Marek Vasut and Andrew Jenner.
>
> Signed-off-by: Sandra Loosemore <address@hidden>
> Signed-off-by: Julian Brown <address@hidden>
> Signed-off-by: Andrew Jenner <address@hidden>
> Signed-off-by: Marek Vasut <address@hidden>
> ---
> @@ -149,16 +148,22 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
> kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
> &entry, &low, &high,
> big_endian, EM_ALTERA_NIOS2, 0, 0);
> - base32 = entry;
> - if (base32 == 0xc0000000) {
> + if ((uint32_t)entry == 0xc0000000) {
> + /* The Nios II processor reference guide documents that the
> + kernel is placed at virtual memory address 0xc0000000,
> + and we've got something that points there. Reload it
> + and adjust the entry to get the address in physical RAM. */
If you run your patch through scripts/checkpatch.pl it will
(absent bugs in checkpatch) warn you that this isn't QEMU's
preferred style for block comments:
/*
* We prefer like this, with stars on the left side
* and the opening and closing wings both on a line
* of their own.
*/
> +static void nios2_generic_nommu_init(MachineState *machine)
> +{
> + Nios2CPU *cpu;
> + MemoryRegion *address_space_mem = get_system_memory();
> + MemoryRegion *phys_tcm = g_new(MemoryRegion, 1);
> + MemoryRegion *phys_tcm_alias = g_new(MemoryRegion, 1);
> + MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
> + MemoryRegion *phys_ram_alias = g_new(MemoryRegion, 1);
> + ram_addr_t tcm_base = 0x0;
> + ram_addr_t tcm_size = 0x1000; /* 1 kiB, but QEMU limit is 4 kiB */
> + ram_addr_t ram_base = 0x10000000;
> + ram_addr_t ram_size = 0x08000000;
> +
> + /* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */
> + memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size,
> + &error_abort);
> + memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias",
> + phys_tcm, 0, tcm_size);
> + memory_region_add_subregion(address_space_mem, tcm_base, phys_tcm);
> + memory_region_add_subregion(address_space_mem, 0xc0000000 + tcm_base,
> + phys_tcm_alias);
> +
> + /* Physical DRAM with alias at 0xc0000000 */
> + memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size,
> + &error_abort);
> + memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias",
> + phys_ram, 0, ram_size);
> + memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
> + memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base,
> + phys_ram_alias);
> +
> + cpu = NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU));
> +
> + /* Remove MMU */
> + cpu->mmu_present = false;
> +
> + /* Reset vector is the first 32 bytes of RAM. */
> + cpu->reset_addr = ram_base;
> +
> + /* The libgloss linker script doesn't include an exception vector,
> + so use the reset address. Boo. */
> + cpu->exception_addr = cpu->reset_addr;
If this is a bad thing would it better to fix the libgloss
linker script ?
thanks
-- PMM