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Re: [Qemu-devel] [PATCH v3] target/mips: Fix minor bug in FPU


From: Mateja Marjanovic
Subject: Re: [Qemu-devel] [PATCH v3] target/mips: Fix minor bug in FPU
Date: Wed, 20 Mar 2019 12:20:55 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1


On 19.3.19. 16:27, Peter Maydell wrote:
On Tue, 19 Mar 2019 at 15:22, Mateja Marjanovic
<address@hidden> wrote:
From: Mateja Marjanovic <address@hidden>

Wrong type of NaN was generated for IEEE 754-2008 by MADDF.<D|S> and
MSUBF.<D|S> instructions when the arguments were (inf, zero, nan) or
(zero, inf, nan).
These instructions were tested and the results match with the results
of the machine that has a MIPS64 r6 cpu.

Signed-off-by: Mateja Marjanovic <address@hidden>
---
  fpu/softfloat-specialize.h | 24 ++++++++++++++++--------
  1 file changed, 16 insertions(+), 8 deletions(-)

Reviewed-by: Peter Maydell <address@hidden>
Thank you for reviewing.
thanks
-- PMM

Regards,

Mateja




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