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[Qemu-devel] [PULL 23/60] ppc/xive: export the TIMA memory accessors
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 23/60] ppc/xive: export the TIMA memory accessors |
Date: |
Sun, 10 Mar 2019 19:26:26 +1100 |
From: Cédric Le Goater <address@hidden>
The PowerNV machine can perform indirect loads and stores on the TIMA
on behalf of another CPU. Give the controller the possibility to call
the TIMA memory accessors with a XiveTCTX of its choice.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xive.c | 23 ++++++++++++++++++-----
include/hw/ppc/xive.h | 3 +++
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index b21759c938..3d7de864e9 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -317,10 +317,9 @@ static const XiveTmOp *xive_tm_find_op(hwaddr offset,
unsigned size, bool write)
/*
* TIMA MMIO handlers
*/
-static void xive_tm_write(void *opaque, hwaddr offset,
- uint64_t value, unsigned size)
+void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value,
+ unsigned size)
{
- XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu);
const XiveTmOp *xto;
/*
@@ -356,9 +355,8 @@ static void xive_tm_write(void *opaque, hwaddr offset,
xive_tm_raw_write(tctx, offset, value, size);
}
-static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size)
+uint64_t xive_tctx_tm_read(XiveTCTX *tctx, hwaddr offset, unsigned size)
{
- XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu);
const XiveTmOp *xto;
/*
@@ -392,6 +390,21 @@ static uint64_t xive_tm_read(void *opaque, hwaddr offset,
unsigned size)
return xive_tm_raw_read(tctx, offset, size);
}
+static void xive_tm_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu);
+
+ xive_tctx_tm_write(tctx, offset, value, size);
+}
+
+static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size)
+{
+ XiveTCTX *tctx = xive_router_get_tctx(XIVE_ROUTER(opaque), current_cpu);
+
+ return xive_tctx_tm_read(tctx, offset, size);
+}
+
const MemoryRegionOps xive_tm_ops = {
.read = xive_tm_read,
.write = xive_tm_write,
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 13a487527b..7dd80e0f46 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -410,6 +410,9 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t
width, Monitor *mon);
#define XIVE_TM_USER_PAGE 0x3
extern const MemoryRegionOps xive_tm_ops;
+void xive_tctx_tm_write(XiveTCTX *tctx, hwaddr offset, uint64_t value,
+ unsigned size);
+uint64_t xive_tctx_tm_read(XiveTCTX *tctx, hwaddr offset, unsigned size);
void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr, Error **errp);
--
2.20.1
- [Qemu-devel] [PULL 21/60] ppc/xive: hardwire the Physical CAM line of the thread context, (continued)
- [Qemu-devel] [PULL 21/60] ppc/xive: hardwire the Physical CAM line of the thread context, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 06/60] target/ppc: Implement large decrementer support for TCG, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 15/60] target/ppc: Refactor kvm_handle_debug, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 22/60] ppc: externalize ppc_get_vcpu_by_pir(), David Gibson, 2019/03/10
- [Qemu-devel] [PULL 25/60] ppc/pnv: change the CPU machine_data presenter type to Object *, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 20/60] PPC: E500: Add FSL I2C controller and integrate RTC with it, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 32/60] ppc/pnv: psi: add a reset handler, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 30/60] ppc/pnv: fix logging primitives using Ox, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 28/60] ppc/pnv: introduce a new pic_print_info() operation to the chip model, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 31/60] ppc/pnv: psi: add a PSIHB_REG macro, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 23/60] ppc/xive: export the TIMA memory accessors,
David Gibson <=
- [Qemu-devel] [PULL 41/60] mac_oldworld: use node name instead of alias name for hd device in FWPathProvider, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 24/60] ppc/pnv: export the xive_router_notify() routine, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 27/60] ppc/pnv: introduce a new dt_populate() operation to the chip model, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 37/60] target/ppc: introduce avr_full_offset() function, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 40/60] target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}(), David Gibson, 2019/03/10
- [Qemu-devel] [PULL 26/60] ppc/pnv: add a XIVE interrupt controller model for POWER9, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 42/60] mac_newworld: use node name instead of alias name for hd device in FWPathProvider, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 35/60] target/ppc: introduce single vsrl_offset() function, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 34/60] target/ppc: introduce single fpr_offset() function, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 38/60] target/ppc: improve avr64_offset() and use it to simplify get_avr64()/set_avr64(), David Gibson, 2019/03/10