Re: [Qemu-devel] [PATCH 2/2] target/arm: Implement ARMv8.0-PredRes

[Peter Maydell]

On Tue, 26 Feb 2019 at 18:52, Richard Henderson
<address@hidden> wrote:
>
> On 2/26/19 10:44 AM, Peter Maydell wrote:
> > On Wed, 20 Feb 2019 at 23:50, Richard Henderson
> > <address@hidden> wrote:
> >>
> >> This is named "Execution and Data prediction restriction instructions"
> >> within the ARMv8.5 manual, and given the name "PredRes" by binutils.
> >
> > The official name is v8.0-PredInv.
> > (You can see this used in the xml descriptions for the new insns, eg:
> > https://developer.arm.com/docs/ddi0595/b/aarch64-system-instructions/cfp-rctx
> >  )
>
> Thanks.  I may file a bug against binutils.  ;-)
>
> >> +
> >> +    /* All v8.0-a cpus support aarch64.  */
> >
> > True, but why is it relevant here ?
> >
> >> +    if (cpu_isar_feature(aa64_specres, cpu)) {
> >> +        define_arm_cp_regs(cpu, specres_reginfo);
> >> +    }
>
> The context, I think, is that we're in a function that handles a32,
> and I am not checking arm_feature(cpu, ARM_FEATURE_AARCH64) before
> checking cpu_isar_feature(aa64_specres, cpu).
>
> At least that's my recollection.

Ah, so in theory if we had a v8.0 CPU which was AArch32 only
it would not have those ID bits set and fail to register
these registers. I'm pretty sure it would also not work in
a bunch of other ways too...

thanks
-- PMM