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Re: [Qemu-devel] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs |
Date: |
Wed, 20 Feb 2019 10:05:10 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 2/19/19 4:58 AM, Peter Maydell wrote:
> Create and connect the MHUs in the SSE-200.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> include/hw/arm/armsse.h | 3 ++-
> hw/arm/armsse.c | 40 ++++++++++++++++++++++++++++++----------
> 2 files changed, 32 insertions(+), 11 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
> + /*
> + * An SSE-200 with only one CPU should have only one MHU created,
> + * with the region where the second MHU usually is being RAZ/WI.
> + * We don't implement that SSE-200 config; if we want to support
> + * it then this code needs to be enhanced to handle creating the
> + * RAZ/WI region instead of the second MHU.
> + */
> + assert(info->num_cpus > 1);
> +
> + for (i = 0; i < ARRAY_SIZE(s->mhu); i++) {
Nit: x > 1 is probably better as x == ARRAY_SIZE(s->mhu).
r~
- [Qemu-devel] [PATCH 0/8] ARMSSE: Implement MHUs and dual-core capability, Peter Maydell, 2019/02/19
- [Qemu-devel] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs, Peter Maydell, 2019/02/19
- Re: [Qemu-devel] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs,
Richard Henderson <=
- [Qemu-devel] [PATCH 3/8] target/arm/cpu: Allow init-svtor property to be set after realize, Peter Maydell, 2019/02/19
- [Qemu-devel] [PATCH 1/8] hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit, Peter Maydell, 2019/02/19
- [Qemu-devel] [PATCH 4/8] target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset(), Peter Maydell, 2019/02/19
- [Qemu-devel] [PATCH 5/8] hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name, Peter Maydell, 2019/02/19
- [Qemu-devel] [PATCH 6/8] hw/arm/iotkit-sysctl: Add SSE-200 registers, Peter Maydell, 2019/02/19