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[Qemu-devel] [PULL 34/37] arm: Add Clock peripheral stub to NRF51 SOC
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 34/37] arm: Add Clock peripheral stub to NRF51 SOC |
Date: |
Mon, 7 Jan 2019 16:31:14 +0000 |
From: Steffen Görtz <address@hidden>
This stubs enables the microbit-micropython firmware to run
on the microbit machine.
Signed-off-by: Steffen Görtz <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/nrf51_soc.h | 1 +
hw/arm/nrf51_soc.c | 26 ++++++++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h
index 39e613e1c97..e06f0304b48 100644
--- a/include/hw/arm/nrf51_soc.h
+++ b/include/hw/arm/nrf51_soc.h
@@ -38,6 +38,7 @@ typedef struct NRF51State {
MemoryRegion iomem;
MemoryRegion sram;
MemoryRegion flash;
+ MemoryRegion clock;
uint32_t sram_size;
uint32_t flash_size;
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index ef70bd62fa4..1630c275940 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -34,6 +34,26 @@
#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
+static uint64_t clock_read(void *opaque, hwaddr addr, unsigned int size)
+{
+ qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n",
+ __func__, addr, size);
+ return 1;
+}
+
+static void clock_write(void *opaque, hwaddr addr, uint64_t data,
+ unsigned int size)
+{
+ qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n",
+ __func__, addr, data, size);
+}
+
+static const MemoryRegionOps clock_ops = {
+ .read = clock_read,
+ .write = clock_write
+};
+
+
static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
{
NRF51State *s = NRF51_SOC(dev_soc);
@@ -130,6 +150,12 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error
**errp)
BASE_TO_IRQ(base_addr)));
}
+ /* STUB Peripherals */
+ memory_region_init_io(&s->clock, NULL, &clock_ops, NULL,
+ "nrf51_soc.clock", 0x1000);
+ memory_region_add_subregion_overlap(&s->container,
+ NRF51_IOMEM_BASE, &s->clock, -1);
+
create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE,
NRF51_IOMEM_SIZE);
create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE,
--
2.19.2
- [Qemu-devel] [PULL 30/37] tests/microbit-test: Add Tests for nRF51 GPIO, (continued)
- [Qemu-devel] [PULL 30/37] tests/microbit-test: Add Tests for nRF51 GPIO, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 26/37] hw/misc/nrf51_rng: Add NRF51 random number generator peripheral, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 31/37] hw/timer/nrf51_timer: Add nRF51 Timer peripheral, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 29/37] arm: Instantiate NRF51 general purpose I/O, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 28/37] hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 37/37] Support u-boot noload images for arm as used by, NetBSD/evbarm GENERIC kernel., Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 33/37] tests/microbit-test: Add Tests for nRF51 Timer, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 32/37] arm: Instantiate NRF51 Timers, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 35/37] target/arm: Emit barriers for A32/T32 load-acquire/store-release insns, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 36/37] hw/misc/tz-mpc: Fix value of BLK_MAX register, Peter Maydell, 2019/01/07
- [Qemu-devel] [PULL 34/37] arm: Add Clock peripheral stub to NRF51 SOC,
Peter Maydell <=
- Re: [Qemu-devel] [PULL 00/37] target-arm queue, Peter Maydell, 2019/01/07
- Re: [Qemu-devel] [PULL 00/37] target-arm queue, no-reply, 2019/01/07