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Re: [Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements
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From: |
Mark Cave-Ayland |
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Subject: |
Re: [Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements |
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Date: |
Tue, 18 Dec 2018 15:05:50 +0000 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 |
On 18/12/2018 09:49, Mark Cave-Ayland wrote:
> Following on from this, the next patch "target/ppc: convert vsplt[bhw] to use
> vector
> operations" causes corruption of the OS X splash screen
> (https://www.ilande.co.uk/tmp/qemu/badapple2.png) in a way that suggests
> there may be
> an endian issue.
Changing "#ifndef HOST_WORDS_BIGENDIAN" to "#ifdef HOST_WORDS_BIGENDIAN" in this
patch helps a lot, but something still isn't quite right:
https://www.ilande.co.uk/tmp/qemu/badapple3.png.
Adding some more debugging seems to suggest that boffs is being handled
correctly
based upon vece/uimm...
ins: vsplth bofs before: 304e0
bofs after: 304e0 uimm: 0 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e2 uimm: 1 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e4 uimm: 2 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e6 uimm: 3 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e0 uimm: 0 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e2 uimm: 1 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e4 uimm: 2 vece: 1
ins: vsplth bofs before: 304e0
bofs after: 304e6 uimm: 3 vece: 1
ins: vsplth bofs before: 30560
bofs after: 3056e uimm: 7 vece: 1
ins: vsplth bofs before: 30540
bofs after: 3054e uimm: 7 vece: 1
ins: vsplth bofs before: 30490
bofs after: 30492 uimm: 1 vece: 1
ins: vspltw bofs before: 30580
bofs after: 3058c uimm: 3 vece: 2
ins: vsplth bofs before: 30580
bofs after: 30586 uimm: 3 vece: 1
ins: vspltw bofs before: 30580
bofs after: 30580 uimm: 0 vece: 2
ins: vspltb bofs before: 30560
bofs after: 30560 uimm: 0 vece: 0
ins: vsplth bofs before: 304d0
bofs after: 304d0 uimm: 0 vece: 1
ins: vsplth bofs before: 304d0
bofs after: 304d2 uimm: 1 vece: 1
ins: vsplth bofs before: 304d0
bofs after: 304d4 uimm: 2 vece: 1
ins: vsplth bofs before: 304d0
bofs after: 304d4 uimm: 2 vece: 1
ATB,
Mark.
- [Qemu-devel] [PATCH 16/34] target/ppc: move FP and VMX registers into aligned vsr register array, (continued)
- [Qemu-devel] [PATCH 16/34] target/ppc: move FP and VMX registers into aligned vsr register array, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 24/34] target/ppc: convert xxspltw to vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 11/34] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 25/34] target/ppc: convert xxsel to vector operations, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 01/34] tcg: Add logical simplifications during gvec expand, Richard Henderson, 2018/12/18
- [Qemu-devel] [PATCH 13/34] target/ppc: introduce get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}() helpers for VSR register access, Richard Henderson, 2018/12/18
- Re: [Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements, Mark Cave-Ayland, 2018/12/18
- Re: [Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements,
Mark Cave-Ayland <=