>From 8e3c00db16fcedea0ea47d93c2acb6d7d5ba9164 Mon Sep 17 00:00:00 2001
From: Fredrik Noring <address@hidden>
Date: Thu, 1 Nov 2018 14:36:48 +0000
Subject: [PATCH] MIPS: Use `.set mips2' to emulate LL/SC for the R5900 too

GAS treats the R5900 as MIPS III, with some modifications.  The MIPS III
designation means that the GNU C Library will try to assemble the LL and
SC instructions, even though they are not implemented in the R5900.  GAS
will therefore produce the following errors:

Error: opcode not supported on this processor: r5900 (mips3) `ll $2,0($4)'
Error: opcode not supported on this processor: r5900 (mips3) `sc $6,0($4)'

The MIPS II ISA override as used here enables the kernel to trap and
emulate the LL and SC instructions, as required.

This change has been tested by compiling the GNU C Library 2.27 with a
GCC 8.2.0 cross-compiler for mipsr5900el-unknown-linux-gnu under Gentoo.

	* sysdeps/mips/sys/tas.h (_test_and_set): Handle the R5900 CPU
	with the ISA override.

diff --git a/sysdeps/mips/sys/tas.h b/sysdeps/mips/sys/tas.h
index d5ed013..22cee94 100644
--- a/sysdeps/mips/sys/tas.h
+++ b/sysdeps/mips/sys/tas.h
@@ -38,10 +38,11 @@ __NTH (_test_and_set (int *__p, int __v))
 {
   int __r, __t;
 
+  /* The R5900 reports itself as MIPS III but it does not have LL/SC.  */
   __asm__ __volatile__
     ("/* Inline test and set */\n"
      ".set	push\n\t"
-#if _MIPS_SIM == _ABIO32 && __mips < 2
+#if _MIPS_SIM == _ABIO32 && (__mips < 2 || defined (_MIPS_ARCH_R5900))
      ".set	mips2\n\t"
 #endif
      "sync\n\t"
-- 
2.9.3