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Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the X


From: Logan Gunthorpe
Subject: Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
Date: Wed, 21 Nov 2018 12:19:17 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1


On 2018-11-21 12:16 p.m., Alistair Francis wrote:
>>> Do you see the MicroSemi PCIe probe in your dmesg?
>>
>> I do when I have a kernel with microsemi PCI Support (specifically the
>> one included in the bbl you sent us a while back).
> 
> Yeah, so you need to make sure that doesn't happen.

Well, I also have a kernel (one I've built myself) without microsemi
support, but with Xilinx support and it also doesn't work (see my dmesg
logs I sent).

> For people who have modified the standard bbl to edit the device tree
> before passing it to Linux to add the MicroSemi PCIe node, it won't
> work. That's a very small number of people who have modified the
> standard boot loader. I don't think we need to document how those
> people get back to the default set-up.

I have not done that. And it's not working for me.

Logan



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