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Re: [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R59
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900 M{F, T}{HI, LO}1 and DIV[U]1 |
Date: |
Mon, 5 Nov 2018 13:18:53 +0000 |
> From: Fredrik Noring <address@hidden>
>
> Subject: [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900
> M{F,T}{HI,LO}1 and DIV[U]1
>
> This series amends the R5900 support with the following changes:
>
> ...
Hi, Fridrek,
The two patches look very good. Yes, there will be some code duplication now,
but the overall MIPS code is safer, R5900 code better encapsulated - and you
have more flexibility to tweak R5900 functionality.
For LL, SC, LLD and SCD instructions, there is a need to properly insulate
their R5900 versions too, similar to this:
case OPC_SC:
if(ctx->insn_flags & INSN_R5900) {
check_insn_opc_user_only(ctx, INSN_R5900);
} else {
check_insn(ctx, ISA_MIPS2);
}
gen_st_cond(ctx, op, rt, rs, imm);
break;
(the code above is just a form of pseudocode illustrating the idea; I don't
guarantee the correctness for build purposes, or if this is the best code
organization)
Non-R5900 code (for the time being) should never invoke
check_insn_opc_user_only(). *The only way* of distinguishing R5900 code paths
from the other CPUs code paths should be by using "if(ctx->insn_flags &
INSN_R5900)"!
For changes in decode_opc_special_legacy(), there shouldn't be there, but there
should be a separate function decode_opc_special_tx59() or so.
Thanks,
Aleksandar
- [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900 M{F, T}{HI, LO}1 and DIV[U]1, Fredrik Noring, 2018/11/02
- [Qemu-devel] [PATCH 2/2] target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1, Fredrik Noring, 2018/11/02
- [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Fredrik Noring, 2018/11/02
- Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Philippe Mathieu-Daudé, 2018/11/02
- Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Richard Henderson, 2018/11/04
- Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Fredrik Noring, 2018/11/04
- Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Maciej W. Rozycki, 2018/11/04
- Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Fredrik Noring, 2018/11/05
- Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Maciej W. Rozycki, 2018/11/05
Re: [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900 M{F, T}{HI, LO}1 and DIV[U]1,
Aleksandar Markovic <=