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[Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI |
Date: |
Fri, 2 Nov 2018 17:16:33 +0000 |
From: Philippe Mathieu-Daudé <address@hidden>
Shannon Zhao's email at Huawei is bouncing: remove it.
X-Failed-Recipients: address@hidden
** Address not found **
Your message wasn't delivered to address@hidden because the address
couldn't be found, or is unable to receive mail.
Note that the section still contains his personal email (see e59f13d76bb).
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 85f19f569ff..98a1856afc0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -627,7 +627,6 @@ F: hw/*/xlnx*.c
F: include/hw/*/xlnx*.h
ARM ACPI Subsystem
-M: Shannon Zhao <address@hidden>
M: Shannon Zhao <address@hidden>
L: address@hidden
S: Maintained
--
2.19.1
- [Qemu-devel] [PULL v3 00/10] target-arm queue, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI,
Peter Maydell <=
- [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat, Peter Maydell, 2018/11/02
- [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART, Peter Maydell, 2018/11/02
- Re: [Qemu-devel] [PULL v3 00/10] target-arm queue, Peter Maydell, 2018/11/02