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[Qemu-devel] [PATCH v2] strongarm: mask off high[32:28] bits from dir an
From: |
P J P |
Subject: |
[Qemu-devel] [PATCH v2] strongarm: mask off high[32:28] bits from dir and state registers |
Date: |
Fri, 26 Oct 2018 13:00:34 +0530 |
From: Prasad J Pandit <address@hidden>
The high[32:28] bits of 'direction' and 'state' registers of
SA-1100/SA-1110 device are reserved. Setting them may lead to
OOB 's->handler[]' array access issue. Mask off [32:28] bits to
avoid it.
Reported-by: Moguofang <address@hidden>
Signed-off-by: Prasad J Pandit <address@hidden>
---
hw/arm/strongarm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Update v2: mask off high[32:28] bits
-> https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg05746.html
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index ec2627374d..dd8c4b1f2e 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -587,12 +587,12 @@ static void strongarm_gpio_write(void *opaque, hwaddr
offset,
switch (offset) {
case GPDR: /* GPIO Pin-Direction registers */
- s->dir = value;
+ s->dir = value & 0x3fffff;
strongarm_gpio_handler_update(s);
break;
case GPSR: /* GPIO Pin-Output Set registers */
- s->olevel |= value;
+ s->olevel |= value & 0x3fffff;
strongarm_gpio_handler_update(s);
break;
--
2.17.2
- [Qemu-devel] [PATCH v2] strongarm: mask off high[32:28] bits from dir and state registers,
P J P <=