[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 07/11] tests/tcg/mips: Test R5900 three-operand MADD
From: |
Fredrik Noring |
Subject: |
[Qemu-devel] [PATCH 07/11] tests/tcg/mips: Test R5900 three-operand MADDU |
Date: |
Thu, 25 Oct 2018 19:33:00 +0200 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
Signed-off-by: Fredrik Noring <address@hidden>
---
tests/tcg/mips/mipsr5900/Makefile | 1 +
tests/tcg/mips/mipsr5900/maddu.c | 37 +++++++++++++++++++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 tests/tcg/mips/mipsr5900/maddu.c
diff --git a/tests/tcg/mips/mipsr5900/Makefile
b/tests/tcg/mips/mipsr5900/Makefile
index 97ca2a671c..27ee5d5f54 100644
--- a/tests/tcg/mips/mipsr5900/Makefile
+++ b/tests/tcg/mips/mipsr5900/Makefile
@@ -11,6 +11,7 @@ CFLAGS = -Wall -mabi=32 -march=r5900 -static
TESTCASES = div1.tst
TESTCASES += divu1.tst
TESTCASES += madd.tst
+TESTCASES += maddu.tst
TESTCASES += mflohi1.tst
TESTCASES += mtlohi1.tst
TESTCASES += mult.tst
diff --git a/tests/tcg/mips/mipsr5900/maddu.c b/tests/tcg/mips/mipsr5900/maddu.c
new file mode 100644
index 0000000000..e4e552102d
--- /dev/null
+++ b/tests/tcg/mips/mipsr5900/maddu.c
@@ -0,0 +1,37 @@
+/*
+ * Test R5900-specific three-operand MADDU.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <assert.h>
+
+uint64_t maddu(uint64_t a, uint32_t rs, uint32_t rt)
+{
+ uint32_t lo = a;
+ uint32_t hi = a >> 32;
+ uint32_t rd;
+ uint64_t r;
+
+ __asm__ __volatile__ (
+ " mtlo %5\n"
+ " mthi %6\n"
+ " maddu %0, %3, %4\n"
+ " mflo %1\n"
+ " mfhi %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt), "r" (lo), "r" (hi));
+ r = ((uint64_t)hi << 32) | (uint32_t)lo;
+
+ assert(a + (uint64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+int main()
+{
+ assert(maddu(13, 17, 19) == 336);
+
+ return 0;
+}
--
2.18.1
- [Qemu-devel] [PATCH 00/11] target/mips: Amend R5900 support, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 01/11] target/mips: Rename ASE_MMI to ASE_TOSHIBA_MMI, with Toshiba namespace, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 02/11] target/mips: R5900 LQ and SQ also belong to the Toshiba MMI ASE, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 03/11] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 04/11] target/mips: Support R5900 three-operand MADD1 and MADDU1, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 05/11] tests/tcg/mips: Test R5900 three-operand MADD, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 06/11] tests/tcg/mips: Test R5900 three-operand MADD1, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 07/11] tests/tcg/mips: Test R5900 three-operand MADDU,
Fredrik Noring <=
- [Qemu-devel] [PATCH 08/11] tests/tcg/mips: Test R5900 three-operand MADDU1, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 09/11] disas/mips: Increase 'member of ISAs' flag holder size, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 10/11] disas/mips: Define R5900 disassembly constants, Fredrik Noring, 2018/10/25
- [Qemu-devel] [PATCH 11/11] disas/mips: Disassemble R5900 DIV[U]1, M{F, T}{LO, HI}1 and MULT[U]1, Fredrik Noring, 2018/10/25