Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900

[Fredrik Noring]

Hi Maciej,

>  I have no authority to approve such a change for the kernel, but it looks 
> reasonable to me and I will support you with it, with one reservation 
> however.  As this is an ISA extension in the vendor-specific space, I 
> think it belongs to a vendor-specific namespace, so as to make it clear it 
> is not a generic architectural feature and also to avoid name clashes.
> 
>  So it has to be called Toshiba MMI or suchlike, similarly to how I 
> requested that for the Longsoon MMI feature in a recent binutils review 
> (cf <https://sourceware.org/ml/binutils/2018-07/msg00201.html> and 
> binutils commit 8095d2f70e1a ("MIPS/GAS: Split Loongson MMI Instructions 
> from loongson2f/3a")), with all the consequences throughout.

Vendor ASE namespaces makes sense to me. I can prepare a patch for it.

>  NB all but pipeline 1 instructions of these are also implemented by other 
> members of the TXx9 family.  They seem to be referred to as just "multiply 
> and multiply-add instructions" in the TX79 manual (cf Section B.3.1).

Would

ASE_TOSHIBA_MMI  -- TX79 128-bit multimedia instructions
ASE_TOSHIBA_MAC  -- TXx9 multiply and multiply-add instructions (MADD etc.)
ASE_TOSHIBA_MAC1 -- TX79 pipeline 1 variant of ASE_TOSHIBA_MAC
ASE_TOSHIBA_FMA  -- R5900 FPU extensions (MADD.s etc.)

be acceptable for the currently known Toshiba extensions? (Please propose
better names.) One complication is that it seems only 8 bits are available
for all vendor ASEs, and Toshiba would then scoop up half of those.

Fredrik