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[Qemu-devel] [PATCH v8 31/38] tests/tcg/mips: Test R5900 DIV1
From: |
Fredrik Noring |
Subject: |
[Qemu-devel] [PATCH v8 31/38] tests/tcg/mips: Test R5900 DIV1 |
Date: |
Sun, 21 Oct 2018 17:42:08 +0200 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
Signed-off-by: Fredrik Noring <address@hidden>
---
tests/tcg/mips/mipsr5900/Makefile | 3 +-
tests/tcg/mips/mipsr5900/div1.c | 73 +++++++++++++++++++++++++++++++
2 files changed, 75 insertions(+), 1 deletion(-)
create mode 100644 tests/tcg/mips/mipsr5900/div1.c
diff --git a/tests/tcg/mips/mipsr5900/Makefile
b/tests/tcg/mips/mipsr5900/Makefile
index 287c248f6d..757eb83862 100644
--- a/tests/tcg/mips/mipsr5900/Makefile
+++ b/tests/tcg/mips/mipsr5900/Makefile
@@ -8,7 +8,8 @@ SIM_FLAGS=-cpu R5900
CC = $(CROSS)gcc
CFLAGS = -Wall -mabi=32 -march=r5900 -static
-TESTCASES = mflohi1.tst
+TESTCASES = div1.tst
+TESTCASES += mflohi1.tst
TESTCASES += mtlohi1.tst
TESTCASES += mult.tst
TESTCASES += multu.tst
diff --git a/tests/tcg/mips/mipsr5900/div1.c b/tests/tcg/mips/mipsr5900/div1.c
new file mode 100644
index 0000000000..83dafa018b
--- /dev/null
+++ b/tests/tcg/mips/mipsr5900/div1.c
@@ -0,0 +1,73 @@
+/*
+ * Test R5900-specific DIV1.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <assert.h>
+
+struct quotient_remainder { int32_t quotient, remainder; };
+
+static struct quotient_remainder div1(int32_t rs, int32_t rt)
+{
+ int32_t lo, hi;
+
+ __asm__ __volatile__ (
+ " div1 $0, %2, %3\n"
+ " mflo1 %0\n"
+ " mfhi1 %1\n"
+ : "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt));
+
+ assert(rs / rt == lo);
+ assert(rs % rt == hi);
+
+ return (struct quotient_remainder) { .quotient = lo, .remainder = hi };
+}
+
+static void verify_div1(int32_t rs, int32_t rt,
+ int32_t expected_quotient,
+ int32_t expected_remainder)
+{
+ struct quotient_remainder qr = div1(rs, rt);
+
+ assert(qr.quotient == expected_quotient);
+ assert(qr.remainder == expected_remainder);
+}
+
+static void verify_div1_negations(int32_t rs, int32_t rt,
+ int32_t expected_quotient,
+ int32_t expected_remainder)
+{
+ verify_div1(rs, rt, expected_quotient, expected_remainder);
+ verify_div1(rs, -rt, -expected_quotient, expected_remainder);
+ verify_div1(-rs, rt, -expected_quotient, -expected_remainder);
+ verify_div1(-rs, -rt, expected_quotient, -expected_remainder);
+}
+
+int main()
+{
+ verify_div1_negations(0, 1, 0, 0);
+ verify_div1_negations(1, 1, 1, 0);
+ verify_div1_negations(1, 2, 0, 1);
+ verify_div1_negations(17, 19, 0, 17);
+ verify_div1_negations(19, 17, 1, 2);
+ verify_div1_negations(77773, 101, 770, 3);
+
+ verify_div1(-0x80000000, 1, -0x80000000, 0);
+
+ /*
+ * Supplementary explanation from the Toshiba TX System RISC TX79 Core
+ * Architecture manual, A-38 and B-7, https://wiki.qemu.org/File:C790.pdf
+ *
+ * Normally, when 0x80000000 (-2147483648) the signed minimum value is
+ * divided by 0xFFFFFFFF (-1), the operation will result in an overflow.
+ * However, in this instruction an overflow exception doesn't occur and
+ * the result will be as follows:
+ *
+ * Quotient is 0x80000000 (-2147483648), and remainder is 0x00000000 (0).
+ */
+ verify_div1(-0x80000000, -1, -0x80000000, 0);
+
+ return 0;
+}
--
2.18.1
- [Qemu-devel] [PATCH v8 21/38] target/mips: Support R5900 MOVN, MOVZ and PREF from MIPS IV, (continued)
- [Qemu-devel] [PATCH v8 21/38] target/mips: Support R5900 MOVN, MOVZ and PREF from MIPS IV, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 22/38] target/mips: Support R5900 three-operand MADD and MADD1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 23/38] target/mips: Support R5900 three-operand MADDU and MADDU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 24/38] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 25/38] tests/tcg/mips: Test R5900 three-operand MULT, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 27/38] tests/tcg/mips: Test R5900 three-operand MULT1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 26/38] tests/tcg/mips: Test R5900 three-operand MULTU, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 28/38] tests/tcg/mips: Test R5900 three-operand MULTU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 29/38] tests/tcg/mips: Test R5900 MFLO1 and MFHI1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 30/38] tests/tcg/mips: Test R5900 MTLO1 and MTHI1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 31/38] tests/tcg/mips: Test R5900 DIV1,
Fredrik Noring <=
- [Qemu-devel] [PATCH v8 32/38] tests/tcg/mips: Test R5900 DIVU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 33/38] tests/tcg/mips: Test R5900 three-operand MADD, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 34/38] tests/tcg/mips: Test R5900 three-operand MADD1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 35/38] tests/tcg/mips: Test R5900 three-operand MADDU, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 36/38] tests/tcg/mips: Test R5900 three-operand MADDU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 37/38] target/mips: Define the R5900 CPU, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 38/38] linux-user/mips: Recognise the R5900 CPU model, Fredrik Noring, 2018/10/21
- Re: [Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900, Aleksandar Markovic, 2018/10/22