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[Qemu-devel] [PATCH v8 16/38] target/mips: Placeholder for R5900 MMI3 in
From: |
Fredrik Noring |
Subject: |
[Qemu-devel] [PATCH v8 16/38] target/mips: Placeholder for R5900 MMI3 instruction subclass |
Date: |
Sun, 21 Oct 2018 17:37:18 +0200 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
Signed-off-by: Fredrik Noring <address@hidden>
---
target/mips/translate.c | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e5ac9f17e0..6d837082a9 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24527,6 +24527,33 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
DisasContext *ctx)
}
}
+static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
+{
+ uint32_t opc = MASK_TX79_MMI3(ctx->opcode);
+
+ switch (opc) {
+ case TX79_MMI3_PMADDUW: /* TODO: TX79_MMI3_PMADDUW */
+ case TX79_MMI3_PSRAVW: /* TODO: TX79_MMI3_PSRAVW */
+ case TX79_MMI3_PMTHI: /* TODO: TX79_MMI3_PMTHI */
+ case TX79_MMI3_PMTLO: /* TODO: TX79_MMI3_PMTLO */
+ case TX79_MMI3_PINTEH: /* TODO: TX79_MMI3_PINTEH */
+ case TX79_MMI3_PMULTUW: /* TODO: TX79_MMI3_PMULTUW */
+ case TX79_MMI3_PDIVUW: /* TODO: TX79_MMI3_PDIVUW */
+ case TX79_MMI3_PCPYUD: /* TODO: TX79_MMI3_PCPYUD */
+ case TX79_MMI3_POR: /* TODO: TX79_MMI3_POR */
+ case TX79_MMI3_PNOR: /* TODO: TX79_MMI3_PNOR */
+ case TX79_MMI3_PEXCH: /* TODO: TX79_MMI3_PEXCH */
+ case TX79_MMI3_PCPYH: /* TODO: TX79_MMI3_PCPYH */
+ case TX79_MMI3_PEXCW: /* TODO: TX79_MMI3_PEXCW */
+ generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI3 */
+ break;
+ default:
+ MIPS_INVAL("TX79 MMI class MMI3");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ }
+}
+
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_TX79_MMI(ctx->opcode);
@@ -24541,6 +24568,9 @@ static void decode_tx79_mmi(CPUMIPSState *env,
DisasContext *ctx)
case TX79_MMI_CLASS_MMI2:
decode_tx79_mmi2(env, ctx);
break;
+ case TX79_MMI_CLASS_MMI3:
+ decode_tx79_mmi3(env, ctx);
+ break;
case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */
case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */
case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */
@@ -24554,7 +24584,6 @@ static void decode_tx79_mmi(CPUMIPSState *env,
DisasContext *ctx)
case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */
case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */
case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */
- case TX79_MMI_CLASS_MMI3: /* TODO: TX79_MMI_CLASS_MMI3 */
case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */
case TX79_MMI_PMTHL: /* TODO: TX79_MMI_PMTHL */
case TX79_MMI_PSLLH: /* TODO: TX79_MMI_PSLLH */
--
2.18.1
- [Qemu-devel] [PATCH v8 06/38] target/mips: Define R5900 MMI0 opcode constants, (continued)
- [Qemu-devel] [PATCH v8 06/38] target/mips: Define R5900 MMI0 opcode constants, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 08/38] target/mips: Define R5900 MMI2 opcode constants, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 07/38] target/mips: Define R5900 MMI1 opcode constants, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 09/38] target/mips: Define R5900 MMI3 opcode constants, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 10/38] target/mips: Placeholder for R5900 MMI SQ, handle user mode RDHWR, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 11/38] target/mips: Placeholder for R5900 MMI LQ, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 12/38] target/mips: Placeholder for R5900 MMI instruction class, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 13/38] target/mips: Placeholder for R5900 MMI0 instruction subclass, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 14/38] target/mips: Placeholder for R5900 MMI1 instruction subclass, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 15/38] target/mips: Placeholder for R5900 MMI2 instruction subclass, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 16/38] target/mips: Placeholder for R5900 MMI3 instruction subclass,
Fredrik Noring <=
- [Qemu-devel] [PATCH v8 17/38] target/mips: Support R5900 three-operand MULT and MULTU, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 18/38] target/mips: Support R5900 three-operand MULT1 and MULTU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 19/38] target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 20/38] target/mips: Support R5900 DIV1 and DIVU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 21/38] target/mips: Support R5900 MOVN, MOVZ and PREF from MIPS IV, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 22/38] target/mips: Support R5900 three-operand MADD and MADD1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 23/38] target/mips: Support R5900 three-operand MADDU and MADDU1, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 24/38] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 25/38] tests/tcg/mips: Test R5900 three-operand MULT, Fredrik Noring, 2018/10/21
- [Qemu-devel] [PATCH v8 27/38] tests/tcg/mips: Test R5900 three-operand MULT1, Fredrik Noring, 2018/10/21